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-rw-r--r--src/southbridge/intel/esb6300/esb6300_early_smbus.c4
-rw-r--r--src/southbridge/intel/i3100/i3100_early_smbus.c2
-rw-r--r--src/southbridge/intel/i82371eb/i82371eb_early_smbus.c4
-rw-r--r--src/southbridge/intel/i82371eb/i82371eb_smbus.h2
-rw-r--r--src/southbridge/intel/i82801ax/i82801ax_early_smbus.c4
-rw-r--r--src/southbridge/intel/i82801ax/i82801ax_smbus.h4
-rw-r--r--src/southbridge/intel/i82801ax/i82801ax_watchdog.c2
-rw-r--r--src/southbridge/intel/i82801bx/i82801bx_early_smbus.c4
-rw-r--r--src/southbridge/intel/i82801bx/i82801bx_smbus.h4
-rw-r--r--src/southbridge/intel/i82801bx/i82801bx_watchdog.c2
-rw-r--r--src/southbridge/intel/i82801cx/i82801cx_early_smbus.c2
-rw-r--r--src/southbridge/intel/i82801dx/i82801dx_early_smbus.c6
-rw-r--r--src/southbridge/intel/i82801ex/i82801ex_early_smbus.c6
-rw-r--r--src/southbridge/intel/i82801ex/i82801ex_watchdog.c2
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx_early_smbus.c2
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx_watchdog.c2
16 files changed, 26 insertions, 26 deletions
diff --git a/src/southbridge/intel/esb6300/esb6300_early_smbus.c b/src/southbridge/intel/esb6300/esb6300_early_smbus.c
index 503d573dea..ae7cfcd227 100644
--- a/src/southbridge/intel/esb6300/esb6300_early_smbus.c
+++ b/src/southbridge/intel/esb6300/esb6300_early_smbus.c
@@ -6,7 +6,7 @@ static void enable_smbus(void)
{
device_t dev = PCI_DEV(0x0, 0x1f, 0x3);
- print_spew("SMBus controller enabled\r\n");
+ print_spew("SMBus controller enabled\n");
pci_write_config32(dev, 0x20, SMBUS_IO_BASE | 1);
pci_write_config8(dev, 0x40, 1);
pci_write_config8(dev, 0x4, 1);
@@ -92,7 +92,7 @@ static int smbus_write_block(unsigned device, unsigned length, unsigned cmd,
SMBUS_IO_BASE + SMBHSTSTAT);
}
- print_debug("SMBUS Block complete\r\n");
+ print_debug("SMBUS Block complete\n");
return 0;
}
diff --git a/src/southbridge/intel/i3100/i3100_early_smbus.c b/src/southbridge/intel/i3100/i3100_early_smbus.c
index b7edb9b68c..79825d153a 100644
--- a/src/southbridge/intel/i3100/i3100_early_smbus.c
+++ b/src/southbridge/intel/i3100/i3100_early_smbus.c
@@ -26,7 +26,7 @@ static void enable_smbus(void)
{
device_t dev = PCI_DEV(0x0, 0x1f, 0x3);
- print_spew("SMBus controller enabled\r\n");
+ print_spew("SMBus controller enabled\n");
pci_write_config32(dev, 0x20, SMBUS_IO_BASE | 1);
pci_write_config8(dev, 0x40, 1);
pci_write_config8(dev, 0x4, 1);
diff --git a/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c b/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c
index 689dfed1d1..ada781ec26 100644
--- a/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c
+++ b/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c
@@ -38,9 +38,9 @@ static void enable_smbus(void)
PCI_DEVICE_ID_INTEL_82371AB_SMB_ACPI), 0);
if (dev == PCI_DEV_INVALID)
- die("SMBus controller not found\r\n");
+ die("SMBus controller not found\n");
- print_spew("SMBus controller enabled\r\n");
+ print_spew("SMBus controller enabled\n");
/* Set the SMBus I/O base. */
pci_write_config32(dev, SMBBA, SMBUS_IO_BASE | 1);
diff --git a/src/southbridge/intel/i82371eb/i82371eb_smbus.h b/src/southbridge/intel/i82371eb/i82371eb_smbus.h
index e1893c5cb1..a1ede98eb6 100644
--- a/src/southbridge/intel/i82371eb/i82371eb_smbus.h
+++ b/src/southbridge/intel/i82371eb/i82371eb_smbus.h
@@ -192,7 +192,7 @@ static int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned
#if 0
print_debug("Read fail ");
print_debug_hex16(status_register);
- print_debug("\r\n");
+ print_debug("\n");
#endif
return SMBUS_ERROR;
}
diff --git a/src/southbridge/intel/i82801ax/i82801ax_early_smbus.c b/src/southbridge/intel/i82801ax/i82801ax_early_smbus.c
index d80c29c159..14fa924bea 100644
--- a/src/southbridge/intel/i82801ax/i82801ax_early_smbus.c
+++ b/src/southbridge/intel/i82801ax/i82801ax_early_smbus.c
@@ -58,7 +58,7 @@ static void enable_smbus(void)
/* Clear any lingering errors, so transactions can run. */
outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
- print_debug("SMBus controller enabled\r\n");
+ print_debug("SMBus controller enabled\n");
}
static inline int smbus_read_byte(unsigned device, unsigned address)
@@ -69,7 +69,7 @@ static inline int smbus_read_byte(unsigned device, unsigned address)
static void smbus_write_byte(unsigned device, unsigned address,
unsigned char val)
{
- print_err("Unimplemented smbus_write_byte() called\r\n");
+ print_err("Unimplemented smbus_write_byte() called\n");
return;
}
diff --git a/src/southbridge/intel/i82801ax/i82801ax_smbus.h b/src/southbridge/intel/i82801ax/i82801ax_smbus.h
index 7a7850835b..e4ec70bc5f 100644
--- a/src/southbridge/intel/i82801ax/i82801ax_smbus.h
+++ b/src/southbridge/intel/i82801ax/i82801ax_smbus.h
@@ -116,7 +116,7 @@ static int do_smbus_write_block(unsigned device, unsigned length, unsigned cmd,
unsigned data1, unsigned data2)
{
#warning "do_smbus_write_block is commented out"
- print_err("Untested smbus_write_block called\r\n");
+ print_err("Untested smbus_write_block called\n");
#if 0
unsigned char global_control_register;
unsigned char global_status_register;
@@ -177,7 +177,7 @@ static int do_smbus_write_block(unsigned device, unsigned length, unsigned cmd,
SMBUS_IO_BASE + SMBHSTSTAT);
}
- print_debug("SMBUS Block complete\r\n");
+ print_debug("SMBUS Block complete\n");
return 0;
#endif
}
diff --git a/src/southbridge/intel/i82801ax/i82801ax_watchdog.c b/src/southbridge/intel/i82801ax/i82801ax_watchdog.c
index 6a3d4947e8..cd0c20d98e 100644
--- a/src/southbridge/intel/i82801ax/i82801ax_watchdog.c
+++ b/src/southbridge/intel/i82801ax/i82801ax_watchdog.c
@@ -51,5 +51,5 @@ void watchdog_off(void)
outw(0x0008, base + 0x04);
outw(0x0002, base + 0x06);
- printk(BIOS_DEBUG, "ICH Watchdog disabled\r\n");
+ printk(BIOS_DEBUG, "ICH Watchdog disabled\n");
}
diff --git a/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c b/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c
index b8ec9b7528..66935661dd 100644
--- a/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c
+++ b/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c
@@ -58,7 +58,7 @@ static void enable_smbus(void)
/* Clear any lingering errors, so transactions can run. */
outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
- print_debug("SMBus controller enabled\r\n");
+ print_debug("SMBus controller enabled\n");
}
static inline int smbus_read_byte(unsigned device, unsigned address)
@@ -69,7 +69,7 @@ static inline int smbus_read_byte(unsigned device, unsigned address)
static void smbus_write_byte(unsigned device, unsigned address,
unsigned char val)
{
- print_err("Unimplemented smbus_write_byte() called\r\n");
+ print_err("Unimplemented smbus_write_byte() called\n");
return;
}
diff --git a/src/southbridge/intel/i82801bx/i82801bx_smbus.h b/src/southbridge/intel/i82801bx/i82801bx_smbus.h
index 7a7850835b..e4ec70bc5f 100644
--- a/src/southbridge/intel/i82801bx/i82801bx_smbus.h
+++ b/src/southbridge/intel/i82801bx/i82801bx_smbus.h
@@ -116,7 +116,7 @@ static int do_smbus_write_block(unsigned device, unsigned length, unsigned cmd,
unsigned data1, unsigned data2)
{
#warning "do_smbus_write_block is commented out"
- print_err("Untested smbus_write_block called\r\n");
+ print_err("Untested smbus_write_block called\n");
#if 0
unsigned char global_control_register;
unsigned char global_status_register;
@@ -177,7 +177,7 @@ static int do_smbus_write_block(unsigned device, unsigned length, unsigned cmd,
SMBUS_IO_BASE + SMBHSTSTAT);
}
- print_debug("SMBUS Block complete\r\n");
+ print_debug("SMBUS Block complete\n");
return 0;
#endif
}
diff --git a/src/southbridge/intel/i82801bx/i82801bx_watchdog.c b/src/southbridge/intel/i82801bx/i82801bx_watchdog.c
index fb45f521c5..fcb08a1a0c 100644
--- a/src/southbridge/intel/i82801bx/i82801bx_watchdog.c
+++ b/src/southbridge/intel/i82801bx/i82801bx_watchdog.c
@@ -50,5 +50,5 @@ void watchdog_off(void)
outw(0x0008, base + 0x04);
outw(0x0002, base + 0x06);
- printk(BIOS_DEBUG, "ICH Watchdog disabled\r\n");
+ printk(BIOS_DEBUG, "ICH Watchdog disabled\n");
}
diff --git a/src/southbridge/intel/i82801cx/i82801cx_early_smbus.c b/src/southbridge/intel/i82801cx/i82801cx_early_smbus.c
index 9c3480283c..02420ef75b 100644
--- a/src/southbridge/intel/i82801cx/i82801cx_early_smbus.c
+++ b/src/southbridge/intel/i82801cx/i82801cx_early_smbus.c
@@ -5,7 +5,7 @@ static void enable_smbus(void)
{
device_t dev = PCI_DEV(0x0, 0x1f, 0x3);
- print_debug("SMBus controller enabled\r\n");
+ print_debug("SMBus controller enabled\n");
/* set smbus iobase */
pci_write_config32(dev, SMB_BASE, SMBUS_IO_BASE | PCI_BASE_ADDRESS_SPACE_IO);
/* Set smbus enable */
diff --git a/src/southbridge/intel/i82801dx/i82801dx_early_smbus.c b/src/southbridge/intel/i82801dx/i82801dx_early_smbus.c
index 30d197c461..b36f03e83d 100644
--- a/src/southbridge/intel/i82801dx/i82801dx_early_smbus.c
+++ b/src/southbridge/intel/i82801dx/i82801dx_early_smbus.c
@@ -42,7 +42,7 @@ static void enable_smbus(void)
{
device_t dev = PCI_DEV(0x0, 0x1f, 0x3);
- print_debug("SMBus controller enabled\r\n");
+ print_debug("SMBus controller enabled\n");
/* set smbus iobase */
pci_write_config32(dev, 0x20, SMBUS_IO_BASE | 1);
/* Set smbus enable */
@@ -119,7 +119,7 @@ static int smbus_read_byte(unsigned device, unsigned address)
unsigned char global_status_register;
unsigned char byte;
- /*print_err("smbus_read_byte\r\n"); */
+ /*print_err("smbus_read_byte\n"); */
if (smbus_wait_until_ready() < 0) {
print_err_hex8(-2);
return -2;
@@ -169,7 +169,7 @@ static int smbus_read_byte(unsigned device, unsigned address)
/*
print_err("smbus_read_byte: ");
print_err_hex32(device); print_err(" ad "); print_err_hex32(address);
- print_err("value "); print_err_hex8(byte); print_err("\r\n");
+ print_err("value "); print_err_hex8(byte); print_err("\n");
*/
return byte;
}
diff --git a/src/southbridge/intel/i82801ex/i82801ex_early_smbus.c b/src/southbridge/intel/i82801ex/i82801ex_early_smbus.c
index c86bf23bb7..0ad5c74ee0 100644
--- a/src/southbridge/intel/i82801ex/i82801ex_early_smbus.c
+++ b/src/southbridge/intel/i82801ex/i82801ex_early_smbus.c
@@ -6,7 +6,7 @@ static void enable_smbus(void)
{
device_t dev = PCI_DEV(0x0, 0x1f, 0x3);
- print_spew("SMBus controller enabled\r\n");
+ print_spew("SMBus controller enabled\n");
pci_write_config32(dev, 0x20, SMBUS_IO_BASE | 1);
print_debug_hex32(pci_read_config32(dev, 0x20));
@@ -35,7 +35,7 @@ static void smbus_write_byte(unsigned device, unsigned address, unsigned char va
return;
}
- print_debug("Unimplemented smbus_write_byte() called.\r\n");
+ print_debug("Unimplemented smbus_write_byte() called.\n");
#if 0
/* setup transaction */
@@ -125,7 +125,7 @@ static int smbus_write_block(unsigned device, unsigned length, unsigned cmd,
SMBUS_IO_BASE + SMBHSTSTAT);
}
- print_debug("SMBUS Block complete\r\n");
+ print_debug("SMBUS Block complete\n");
return 0;
}
diff --git a/src/southbridge/intel/i82801ex/i82801ex_watchdog.c b/src/southbridge/intel/i82801ex/i82801ex_watchdog.c
index 205ea87d94..26f6644763 100644
--- a/src/southbridge/intel/i82801ex/i82801ex_watchdog.c
+++ b/src/southbridge/intel/i82801ex/i82801ex_watchdog.c
@@ -24,6 +24,6 @@ void watchdog_off(void)
/* Clear TCO timeout status */
outw(0x0008, base + 0x04);
outw(0x0002, base + 0x06);
- printk(BIOS_DEBUG, "Watchdog ICH5 disabled\r\n");
+ printk(BIOS_DEBUG, "Watchdog ICH5 disabled\n");
}
diff --git a/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c b/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c
index 7c0d97d2c8..7d3c80e8a7 100644
--- a/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c
+++ b/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c
@@ -49,7 +49,7 @@ static void enable_smbus(void)
/* Clear any lingering errors, so transactions can run. */
outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
- print_debug("SMBus controller enabled.\r\n");
+ print_debug("SMBus controller enabled.\n");
}
static inline int smbus_read_byte(unsigned device, unsigned address)
diff --git a/src/southbridge/intel/i82801gx/i82801gx_watchdog.c b/src/southbridge/intel/i82801gx/i82801gx_watchdog.c
index 436a9227cd..a26786d7d0 100644
--- a/src/southbridge/intel/i82801gx/i82801gx_watchdog.c
+++ b/src/southbridge/intel/i82801gx/i82801gx_watchdog.c
@@ -49,5 +49,5 @@ void watchdog_off(void)
outw(0x0008, base + 0x04);
outw(0x0002, base + 0x06);
- printk(BIOS_DEBUG, "ICH7 watchdog disabled\r\n");
+ printk(BIOS_DEBUG, "ICH7 watchdog disabled\n");
}