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-rw-r--r--src/southbridge/intel/bd82x6x/lpc.c2
-rw-r--r--src/southbridge/intel/bd82x6x/sata.c2
-rw-r--r--src/southbridge/intel/common/smihandler.c2
-rw-r--r--src/southbridge/intel/i82801dx/lpc.c1
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c1
-rw-r--r--src/southbridge/intel/i82801ix/lpc.c1
-rw-r--r--src/southbridge/intel/i82801ix/sata.c2
-rw-r--r--src/southbridge/intel/i82801jx/lpc.c1
-rw-r--r--src/southbridge/intel/i82801jx/sata.c2
-rw-r--r--src/southbridge/intel/ibexpeak/lpc.c1
-rw-r--r--src/southbridge/intel/ibexpeak/sata.c2
-rw-r--r--src/southbridge/intel/lynxpoint/lpc.c2
-rw-r--r--src/southbridge/intel/lynxpoint/smihandler.c2
13 files changed, 13 insertions, 8 deletions
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index ef66ca512a..01576a683a 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -20,7 +20,7 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
#include <arch/io.h>
diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c
index 3ec065f287..f5243f6507 100644
--- a/src/southbridge/intel/bd82x6x/sata.c
+++ b/src/southbridge/intel/bd82x6x/sata.c
@@ -20,7 +20,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
#include <acpi/sata.h>
#include <types.h>
diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c
index 7f376fd354..9fba12f9ef 100644
--- a/src/southbridge/intel/common/smihandler.c
+++ b/src/southbridge/intel/common/smihandler.c
@@ -25,7 +25,7 @@
#include <cpu/intel/em64t101_save_state.h>
#include <elog.h>
#include <halt.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
#include <southbridge/intel/common/pmbase.h>
#include <smmstore.h>
diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c
index a46f5a3707..0e2aead4e4 100644
--- a/src/southbridge/intel/i82801dx/lpc.c
+++ b/src/southbridge/intel/i82801dx/lpc.c
@@ -22,6 +22,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
+#include <option.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
#include <arch/io.h>
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index 0330af0060..779d3195e9 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -18,6 +18,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
+#include <option.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index d5417307e7..bac48c256d 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -19,6 +19,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
+#include <option.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
diff --git a/src/southbridge/intel/i82801ix/sata.c b/src/southbridge/intel/i82801ix/sata.c
index fcf4045baf..546acdfc00 100644
--- a/src/southbridge/intel/i82801ix/sata.c
+++ b/src/southbridge/intel/i82801ix/sata.c
@@ -22,7 +22,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
#include <types.h>
#include "chip.h"
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index a594452e04..91b1bde93a 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -19,6 +19,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
+#include <option.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
diff --git a/src/southbridge/intel/i82801jx/sata.c b/src/southbridge/intel/i82801jx/sata.c
index e6e08a31a4..ce8ae470a1 100644
--- a/src/southbridge/intel/i82801jx/sata.c
+++ b/src/southbridge/intel/i82801jx/sata.c
@@ -22,7 +22,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
#include <types.h>
#include "chip.h"
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index 324438ec6b..851f4f51ea 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -19,6 +19,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
+#include <option.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
diff --git a/src/southbridge/intel/ibexpeak/sata.c b/src/southbridge/intel/ibexpeak/sata.c
index 2d9412ad64..04e056492b 100644
--- a/src/southbridge/intel/ibexpeak/sata.c
+++ b/src/southbridge/intel/ibexpeak/sata.c
@@ -21,7 +21,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
#include <acpi/sata.h>
#include <types.h>
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index 62d8aa6385..4b39829e0d 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -20,7 +20,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
#include <arch/io.h>
diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c
index 61f86fb067..72c344757d 100644
--- a/src/southbridge/intel/lynxpoint/smihandler.c
+++ b/src/southbridge/intel/lynxpoint/smihandler.c
@@ -25,7 +25,7 @@
#include <cpu/intel/em64t101_save_state.h>
#include <elog.h>
#include <halt.h>
-#include <pc80/mc146818rtc.h>
+#include <option.h>
#include <southbridge/intel/common/finalize.h>
#include <northbridge/intel/haswell/haswell.h>
#include <cpu/intel/haswell/haswell.h>