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-rw-r--r--src/southbridge/intel/common/Makefile.inc3
-rw-r--r--src/southbridge/intel/fsp_rangeley/Makefile.inc1
-rw-r--r--src/southbridge/intel/fsp_rangeley/romstage.c2
3 files changed, 4 insertions, 2 deletions
diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc
index 1a509b16a4..3224e1fcf1 100644
--- a/src/southbridge/intel/common/Makefile.inc
+++ b/src/southbridge/intel/common/Makefile.inc
@@ -29,7 +29,8 @@ ramstage-y += pmbase.c
postcar-y += pmbase.c
smm-y += pmbase.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += usb_debug.c
+bootblock-$(CONFIG_USBDEBUG) += usb_debug.c
+romstage-$(CONFIG_USBDEBUG) += usb_debug.c
ramstage-$(CONFIG_USBDEBUG) += usb_debug.c
romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c
diff --git a/src/southbridge/intel/fsp_rangeley/Makefile.inc b/src/southbridge/intel/fsp_rangeley/Makefile.inc
index ace227c92e..ac5888ca38 100644
--- a/src/southbridge/intel/fsp_rangeley/Makefile.inc
+++ b/src/southbridge/intel/fsp_rangeley/Makefile.inc
@@ -27,6 +27,7 @@ ramstage-y += acpi.c
romstage-y += early_usb.c early_smbus.c gpio.c early_spi.c early_init.c
romstage-y += romstage.c
+bootblock-$(CONFIG_USBDEBUG) += usb_debug.c
romstage-$(CONFIG_USBDEBUG) += usb_debug.c
ramstage-$(CONFIG_USBDEBUG) += usb_debug.c
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.c b/src/southbridge/intel/fsp_rangeley/romstage.c
index bf92049479..0032fd6715 100644
--- a/src/southbridge/intel/fsp_rangeley/romstage.c
+++ b/src/southbridge/intel/fsp_rangeley/romstage.c
@@ -101,7 +101,7 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) {
__func__, (u32) status, (u32) hob_list_ptr);
/* FSP reconfigures USB, so reinit it to have debug */
- if (IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE))
+ if (IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM))
usbdebug_hw_init(true);
printk(BIOS_DEBUG, "FSP Status: 0x%0x\n", (u32)status);