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-rw-r--r--src/southbridge/intel/bd82x6x/pch.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c
index 0913e1d2f1..3c448defd4 100644
--- a/src/southbridge/intel/bd82x6x/pch.c
+++ b/src/southbridge/intel/bd82x6x/pch.c
@@ -297,6 +297,8 @@ static void pch_pcie_enable(device_t dev)
}
if (!dev->enabled) {
+ printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev));
+
/*
* PCIE Power Savings for PantherPoint and CougarPoint/B1+
*