diff options
Diffstat (limited to 'src/southbridge/nvidia/ck804/ck804_early_smbus.c')
| -rw-r--r-- | src/southbridge/nvidia/ck804/ck804_early_smbus.c | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/src/southbridge/nvidia/ck804/ck804_early_smbus.c b/src/southbridge/nvidia/ck804/ck804_early_smbus.c index 9b6e6d9a6a..2bf6732e79 100644 --- a/src/southbridge/nvidia/ck804/ck804_early_smbus.c +++ b/src/southbridge/nvidia/ck804/ck804_early_smbus.c @@ -11,16 +11,18 @@ static void enable_smbus(void) { device_t dev; dev = pci_locate_device(PCI_ID(0x10de, 0x0052), 0); - if (dev == PCI_DEV_INVALID) { - die("SMBUS controller not found\r\n"); - } + if (dev == PCI_DEV_INVALID) + die("SMBus controller not found\r\n"); print_debug("SMBus controller enabled\r\n"); - /* set smbus iobase */ + + /* Set SMBus I/O base. */ pci_write_config32(dev, 0x20, SMBUS_IO_BASE | 1); - /* Set smbus iospace enable */ + + /* Set SMBus I/O space enable. */ pci_write_config16(dev, 0x4, 0x01); - /* clear any lingering errors, so the transaction will run */ + + /* Clear any lingering errors, so the transaction will run. */ outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT); } @@ -28,7 +30,9 @@ static int smbus_read_byte(unsigned device, unsigned address) { return do_smbus_read_byte(SMBUS_IO_BASE, device, address); } -static int smbus_write_byte(unsigned device, unsigned address, unsigned char val) + +static int smbus_write_byte(unsigned device, unsigned address, + unsigned char val) { return do_smbus_write_byte(SMBUS_IO_BASE, device, address, val); } |