summaryrefslogtreecommitdiff
path: root/src/southbridge/via/vt8235/vt8235_early_smbus.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/southbridge/via/vt8235/vt8235_early_smbus.c')
-rw-r--r--src/southbridge/via/vt8235/vt8235_early_smbus.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/src/southbridge/via/vt8235/vt8235_early_smbus.c b/src/southbridge/via/vt8235/vt8235_early_smbus.c
index 8030f2f3df..9442b6e4d0 100644
--- a/src/southbridge/via/vt8235/vt8235_early_smbus.c
+++ b/src/southbridge/via/vt8235/vt8235_early_smbus.c
@@ -36,7 +36,7 @@ static void enable_smbus(void)
PCI_DEVICE_ID_VIA_8235), 0);
if (dev == PCI_DEV_INVALID) {
- die("SMBUS controller not found\r\n");
+ die("SMBUS controller not found\n");
}
// set IO base address to SMBUS_IO_BASE
@@ -91,7 +91,7 @@ static int smbus_wait_until_ready(void)
while((c & 1) == 1) {
print_debug("c is ");
print_debug_hex8(c);
- print_debug("\r\n");
+ print_debug("\n");
c = inb(SMBUS_IO_BASE + SMBHSTSTAT);
/* nop */
}
@@ -110,7 +110,7 @@ void smbus_reset(void)
smbus_wait_until_ready();
print_debug("After reset status ");
print_debug_hex8( inb(SMBUS_IO_BASE + SMBHSTSTAT));
- print_debug("\r\n");
+ print_debug("\n");
}
@@ -137,21 +137,21 @@ static void smbus_print_error(unsigned char host_status_register)
print_err("smbus_error: ");
print_err_hex8(host_status_register);
- print_err("\r\n");
+ print_err("\n");
if (host_status_register & (1 << 4)) {
- print_err("Interrup/SMI# was Failed Bus Transaction\r\n");
+ print_err("Interrup/SMI# was Failed Bus Transaction\n");
}
if (host_status_register & (1 << 3)) {
- print_err("Bus Error\r\n");
+ print_err("Bus Error\n");
}
if (host_status_register & (1 << 2)) {
- print_err("Device Error\r\n");
+ print_err("Device Error\n");
}
if (host_status_register & (1 << 1)) {
- print_err("Interrupt/SMI# was Successful Completion\r\n");
+ print_err("Interrupt/SMI# was Successful Completion\n");
}
if (host_status_register & (1 << 0)) {
- print_err("Host Busy\r\n");
+ print_err("Host Busy\n");
}
}