summaryrefslogtreecommitdiff
path: root/src/southbridge/via/vt8237r
diff options
context:
space:
mode:
Diffstat (limited to 'src/southbridge/via/vt8237r')
-rw-r--r--src/southbridge/via/vt8237r/lpc.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c
index b1e1afe9c2..207dfdb335 100644
--- a/src/southbridge/via/vt8237r/lpc.c
+++ b/src/southbridge/via/vt8237r/lpc.c
@@ -421,6 +421,9 @@ static void vt8237s_init(struct device *dev)
static void vt8237_common_init(struct device *dev)
{
u8 enables, byte;
+#if !CONFIG_EPIA_VT8237R_INIT
+ unsigned char pwr_on;
+#endif
/* Enable addr/data stepping. */
byte = pci_read_config8(dev, PCI_COMMAND);
@@ -508,6 +511,15 @@ static void vt8237_common_init(struct device *dev)
*/
pci_write_config8(dev, 0x5b, 0xb);
+ /* configure power state of the board after loss of power */
+ if (get_option(&pwr_on, "power_on_after_fail") < 0)
+ pwr_on = 1;
+ enables = pci_read_config8(dev, 0x58);
+ pci_write_config8(dev, 0x58, enables & ~0x02);
+ outb(0x0d, 0x70);
+ outb(pwr_on ? 0x00 : 0x80, 0x71);
+ pci_write_config8(dev, 0x58, enables);
+
/* Set 0x58 to 0x43 APIC and RTC. */
pci_write_config8(dev, 0x58, 0x43);