summaryrefslogtreecommitdiff
path: root/src/southbridge/via
diff options
context:
space:
mode:
Diffstat (limited to 'src/southbridge/via')
-rw-r--r--src/southbridge/via/vt8231/vt8231_early_serial.c2
-rw-r--r--src/southbridge/via/vt8231/vt8231_early_smbus.c20
-rw-r--r--src/southbridge/via/vt8235/vt8235_early_smbus.c18
-rw-r--r--src/southbridge/via/vt8237r/vt8237r_early_smbus.c32
-rw-r--r--src/southbridge/via/vt82c686/vt82c686_early_serial.c2
5 files changed, 37 insertions, 37 deletions
diff --git a/src/southbridge/via/vt8231/vt8231_early_serial.c b/src/southbridge/via/vt8231/vt8231_early_serial.c
index 1bfffed7f5..1083eb67e6 100644
--- a/src/southbridge/via/vt8231/vt8231_early_serial.c
+++ b/src/southbridge/via/vt8231/vt8231_early_serial.c
@@ -39,7 +39,7 @@ static void enable_vt8231_serial(void)
if (dev == PCI_DEV_INVALID) {
outb(7, 0x80);
- die("Serial controller not found\r\n");
+ die("Serial controller not found\n");
}
/* first, you have to enable the superio and superio config.
diff --git a/src/southbridge/via/vt8231/vt8231_early_smbus.c b/src/southbridge/via/vt8231/vt8231_early_smbus.c
index dbb6e213ae..34a1a5c5d8 100644
--- a/src/southbridge/via/vt8231/vt8231_early_smbus.c
+++ b/src/southbridge/via/vt8231/vt8231_early_smbus.c
@@ -30,7 +30,7 @@ static void enable_smbus(void)
dev = pci_locate_device(PCI_ID(0x1106, 0x8235), 0);
if (dev == PCI_DEV_INVALID) {
- die("SMBUS controller not found\r\n");
+ die("SMBUS controller not found\n");
}
// set IO base address to SMBUS_IO_BASE
pci_write_config32(dev, 0x90, SMBUS_IO_BASE | 1);
@@ -47,9 +47,9 @@ static void enable_smbus(void)
c |= 1;
pci_write_config8(dev, 4, c);
print_debug_hex8(c);
- print_debug(" is the comm register\r\n");
+ print_debug(" is the comm register\n");
- print_debug("SMBus controller enabled\r\n");
+ print_debug("SMBus controller enabled\n");
}
@@ -117,7 +117,7 @@ void smbus_reset(void)
smbus_wait_until_ready();
print_debug("After reset status ");
print_debug_hex8(inb(SMBUS_IO_BASE + SMBHSTSTAT));
- print_debug("\r\n");
+ print_debug("\n");
}
static void smbus_print_error(unsigned char host_status_register)
@@ -125,21 +125,21 @@ static void smbus_print_error(unsigned char host_status_register)
print_err("smbus_error: ");
print_err_hex8(host_status_register);
- print_err("\r\n");
+ print_err("\n");
if (host_status_register & (1 << 4)) {
- print_err("Interrup/SMI# was Failed Bus Transaction\r\n");
+ print_err("Interrup/SMI# was Failed Bus Transaction\n");
}
if (host_status_register & (1 << 3)) {
- print_err("Bus Error\r\n");
+ print_err("Bus Error\n");
}
if (host_status_register & (1 << 2)) {
- print_err("Device Error\r\n");
+ print_err("Device Error\n");
}
if (host_status_register & (1 << 1)) {
- print_err("Interrupt/SMI# was Successful Completion\r\n");
+ print_err("Interrupt/SMI# was Successful Completion\n");
}
if (host_status_register & (1 << 0)) {
- print_err("Host Busy\r\n");
+ print_err("Host Busy\n");
}
}
diff --git a/src/southbridge/via/vt8235/vt8235_early_smbus.c b/src/southbridge/via/vt8235/vt8235_early_smbus.c
index 8030f2f3df..9442b6e4d0 100644
--- a/src/southbridge/via/vt8235/vt8235_early_smbus.c
+++ b/src/southbridge/via/vt8235/vt8235_early_smbus.c
@@ -36,7 +36,7 @@ static void enable_smbus(void)
PCI_DEVICE_ID_VIA_8235), 0);
if (dev == PCI_DEV_INVALID) {
- die("SMBUS controller not found\r\n");
+ die("SMBUS controller not found\n");
}
// set IO base address to SMBUS_IO_BASE
@@ -91,7 +91,7 @@ static int smbus_wait_until_ready(void)
while((c & 1) == 1) {
print_debug("c is ");
print_debug_hex8(c);
- print_debug("\r\n");
+ print_debug("\n");
c = inb(SMBUS_IO_BASE + SMBHSTSTAT);
/* nop */
}
@@ -110,7 +110,7 @@ void smbus_reset(void)
smbus_wait_until_ready();
print_debug("After reset status ");
print_debug_hex8( inb(SMBUS_IO_BASE + SMBHSTSTAT));
- print_debug("\r\n");
+ print_debug("\n");
}
@@ -137,21 +137,21 @@ static void smbus_print_error(unsigned char host_status_register)
print_err("smbus_error: ");
print_err_hex8(host_status_register);
- print_err("\r\n");
+ print_err("\n");
if (host_status_register & (1 << 4)) {
- print_err("Interrup/SMI# was Failed Bus Transaction\r\n");
+ print_err("Interrup/SMI# was Failed Bus Transaction\n");
}
if (host_status_register & (1 << 3)) {
- print_err("Bus Error\r\n");
+ print_err("Bus Error\n");
}
if (host_status_register & (1 << 2)) {
- print_err("Device Error\r\n");
+ print_err("Device Error\n");
}
if (host_status_register & (1 << 1)) {
- print_err("Interrupt/SMI# was Successful Completion\r\n");
+ print_err("Interrupt/SMI# was Successful Completion\n");
}
if (host_status_register & (1 << 0)) {
- print_err("Host Busy\r\n");
+ print_err("Host Busy\n");
}
}
diff --git a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
index 17b32d529f..533cbe0c88 100644
--- a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
+++ b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
@@ -39,17 +39,17 @@ static void smbus_print_error(u8 host_status, int loops)
return;
if (loops >= SMBUS_TIMEOUT)
- print_err("SMBus timeout\r\n");
+ print_err("SMBus timeout\n");
if (host_status & (1 << 4))
- print_err("Interrupt/SMI# was Failed Bus Transaction\r\n");
+ print_err("Interrupt/SMI# was Failed Bus Transaction\n");
if (host_status & (1 << 3))
- print_err("Bus error\r\n");
+ print_err("Bus error\n");
if (host_status & (1 << 2))
- print_err("Device error\r\n");
+ print_err("Device error\n");
if (host_status & (1 << 1))
- print_debug("Interrupt/SMI# completed successfully\r\n");
+ print_debug("Interrupt/SMI# completed successfully\n");
if (host_status & (1 << 0))
- print_err("Host busy\r\n");
+ print_err("Host busy\n");
}
/**
@@ -59,7 +59,7 @@ static void smbus_wait_until_ready(void)
{
int loops;
- PRINT_DEBUG("Waiting until SMBus ready\r\n");
+ PRINT_DEBUG("Waiting until SMBus ready\n");
loops = 0;
/* Yes, this is a mess, but it's the easiest way to do it. */
@@ -81,7 +81,7 @@ static void smbus_reset(void)
PRINT_DEBUG("After reset status: ");
PRINT_DEBUG_HEX16(inb(SMBHSTSTAT));
- PRINT_DEBUG("\r\n");
+ PRINT_DEBUG("\n");
}
/**
@@ -98,7 +98,7 @@ u8 smbus_read_byte(u8 dimm, u8 offset)
PRINT_DEBUG_HEX16(dimm);
PRINT_DEBUG(" OFFSET ");
PRINT_DEBUG_HEX16(offset);
- PRINT_DEBUG("\r\n");
+ PRINT_DEBUG("\n");
smbus_reset();
@@ -121,7 +121,7 @@ u8 smbus_read_byte(u8 dimm, u8 offset)
val = inb(SMBHSTDAT0);
PRINT_DEBUG("Read: ");
PRINT_DEBUG_HEX16(val);
- PRINT_DEBUG("\r\n");
+ PRINT_DEBUG("\n");
/* Probably don't have to do this, but it can't hurt. */
smbus_reset();
@@ -144,7 +144,7 @@ void enable_smbus(void)
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_VT8237S_LPC), 0);
if (dev == PCI_DEV_INVALID)
- die("Power management controller not found\r\n");
+ die("Power management controller not found\n");
}
/*
@@ -189,7 +189,7 @@ void smbus_fixup(const struct mem_controller *ctrl)
ram_slots = ARRAY_SIZE(ctrl->channel0);
if (!ram_slots) {
- print_err("smbus_fixup() thinks there are no RAM slots!\r\n");
+ print_err("smbus_fixup() thinks there are no RAM slots!\n");
return;
}
@@ -213,9 +213,9 @@ void smbus_fixup(const struct mem_controller *ctrl)
}
if (i >= SMBUS_TIMEOUT)
- print_err("SMBus timed out while warming up\r\n");
+ print_err("SMBus timed out while warming up\n");
else
- PRINT_DEBUG("Done\r\n");
+ PRINT_DEBUG("Done\n");
}
/* FIXME: Better separate the NB and SB, will be done once it works. */
@@ -310,7 +310,7 @@ int acpi_is_wakeup_early(void) {
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_VT8237S_LPC), 0);
if (dev == PCI_DEV_INVALID)
- die("Power management controller not found\r\n");
+ die("Power management controller not found\n");
}
/* Set ACPI base address to I/O VT8237R_ACPI_IO_BASE. */
@@ -337,7 +337,7 @@ void vt8237_early_spi_init(void)
PCI_DEVICE_ID_VIA_VT8237S_LPC), 0);
if (dev == PCI_DEV_INVALID)
- die("SB not found\r\n");
+ die("SB not found\n");
/* Put SPI base 20 d0 fe. */
tmp = pci_read_config32(dev, 0xbc);
diff --git a/src/southbridge/via/vt82c686/vt82c686_early_serial.c b/src/southbridge/via/vt82c686/vt82c686_early_serial.c
index e5aff02b8a..70c68aaaf5 100644
--- a/src/southbridge/via/vt82c686/vt82c686_early_serial.c
+++ b/src/southbridge/via/vt82c686/vt82c686_early_serial.c
@@ -65,7 +65,7 @@ static void vt82c686_enable_serial(device_t dev, unsigned iobase)
if (sbdev == PCI_DEV_INVALID) {
/* Serial output is not yet working at this point, but
* die() emits the POST code 0xff and halts the CPU, too. */
- die("Southbridge not found.\r\n");
+ die("Southbridge not found.\n");
}
/* Enable Super-I/O (bit 0) and Super-I/O Configuration (bit 1). */
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-24 07:53:43 +0000