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-rw-r--r--src/southbridge/via/k8t890/k8t890_ctrl.c29
-rw-r--r--src/southbridge/via/k8t890/k8t890_dram.c19
-rw-r--r--src/southbridge/via/k8t890/k8t890_error.c16
-rw-r--r--src/southbridge/via/k8t890/k8t890_host.c18
-rw-r--r--src/southbridge/via/k8t890/k8t890_host_ctrl.c18
-rw-r--r--src/southbridge/via/k8t890/k8t890_pcie.c67
-rw-r--r--src/southbridge/via/k8t890/k8t890_traf_ctrl.c22
-rw-r--r--src/southbridge/via/vt8237r/vt8237r.c1
-rw-r--r--src/southbridge/via/vt8237r/vt8237r_bridge.c1
-rw-r--r--src/southbridge/via/vt8237r/vt8237r_ide.c1
-rw-r--r--src/southbridge/via/vt8237r/vt8237r_lpc.c9
-rw-r--r--src/southbridge/via/vt8237r/vt8237r_sata.c1
12 files changed, 99 insertions, 103 deletions
diff --git a/src/southbridge/via/k8t890/k8t890_ctrl.c b/src/southbridge/via/k8t890/k8t890_ctrl.c
index c57c165195..128d50f1a7 100644
--- a/src/southbridge/via/k8t890/k8t890_ctrl.c
+++ b/src/southbridge/via/k8t890/k8t890_ctrl.c
@@ -41,12 +41,17 @@
* V-Link CKG Control 0xb0 0x05 0x05 0x06 0x03
* V-Link CKG Control 0xb1 0x05 0x05 0x01 0x03
*/
-static void ctrl_init(struct device *dev)
+static void ctrl_init_vt8237r(struct device *dev)
{
u8 reg;
+
+ /*
+ * This init code is valid only for the VT8237R! For different
+ * sounthbridges (e.g. VT8237A, VT8237S, VT8237 (without plus R)
+ * and VT8251) a different init code is required.
+ */
device_t devsb = dev_find_device(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_VT8237R_LPC, 0);
-
if (!devsb)
return;
@@ -132,17 +137,17 @@ static void ctrl_enable(struct device *dev)
pci_write_config8(dev, 0x63, regm3 | (regm & 0x3F));
}
-static struct device_operations ctrl_ops = {
- .read_resources = pci_dev_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .enable = ctrl_enable,
- .init = ctrl_init,
- .ops_pci = 0,
+static const struct device_operations ctrl_ops = {
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .enable = ctrl_enable,
+ .init = ctrl_init_vt8237r,
+ .ops_pci = 0,
};
static const struct pci_driver northbridge_driver __pci_driver = {
- .ops = &ctrl_ops,
- .vendor = PCI_VENDOR_ID_VIA,
- .device = PCI_DEVICE_ID_VIA_K8T890CE_7,
+ .ops = &ctrl_ops,
+ .vendor = PCI_VENDOR_ID_VIA,
+ .device = PCI_DEVICE_ID_VIA_K8T890CE_7,
};
diff --git a/src/southbridge/via/k8t890/k8t890_dram.c b/src/southbridge/via/k8t890/k8t890_dram.c
index 9d6517f775..e816594d92 100644
--- a/src/southbridge/via/k8t890/k8t890_dram.c
+++ b/src/southbridge/via/k8t890/k8t890_dram.c
@@ -19,7 +19,6 @@
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
@@ -63,16 +62,16 @@ static void dram_enable(struct device *dev)
pci_write_config16(dev, 0x88, (msr.lo >> 24) | reg);
}
-static struct device_operations dram_ops = {
- .read_resources = pci_dev_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .enable = dram_enable,
- .ops_pci = 0,
+static const struct device_operations dram_ops = {
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .enable = dram_enable,
+ .ops_pci = 0,
};
static const struct pci_driver northbridge_driver __pci_driver = {
- .ops = &dram_ops,
- .vendor = PCI_VENDOR_ID_VIA,
- .device = PCI_DEVICE_ID_VIA_K8T890CE_3,
+ .ops = &dram_ops,
+ .vendor = PCI_VENDOR_ID_VIA,
+ .device = PCI_DEVICE_ID_VIA_K8T890CE_3,
};
diff --git a/src/southbridge/via/k8t890/k8t890_error.c b/src/southbridge/via/k8t890/k8t890_error.c
index 49d32bf903..7c0c744403 100644
--- a/src/southbridge/via/k8t890/k8t890_error.c
+++ b/src/southbridge/via/k8t890/k8t890_error.c
@@ -33,15 +33,15 @@ static void error_enable(struct device *dev)
}
static const struct device_operations error_ops = {
- .read_resources = pci_dev_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .enable = error_enable,
- .ops_pci = 0,
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .enable = error_enable,
+ .ops_pci = 0,
};
static const struct pci_driver northbridge_driver __pci_driver = {
- .ops = &error_ops,
- .vendor = PCI_VENDOR_ID_VIA,
- .device = PCI_DEVICE_ID_VIA_K8T890CE_1,
+ .ops = &error_ops,
+ .vendor = PCI_VENDOR_ID_VIA,
+ .device = PCI_DEVICE_ID_VIA_K8T890CE_1,
};
diff --git a/src/southbridge/via/k8t890/k8t890_host.c b/src/southbridge/via/k8t890/k8t890_host.c
index 980c85dea1..1ed9281a92 100644
--- a/src/southbridge/via/k8t890/k8t890_host.c
+++ b/src/southbridge/via/k8t890/k8t890_host.c
@@ -30,16 +30,16 @@ static void host_enable(struct device *dev)
pci_write_config8(dev, K8T890_MULTIPLE_FN_EN, 0x01);
}
-static struct device_operations host_ops = {
- .read_resources = pci_dev_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .enable = host_enable,
- .ops_pci = 0,
+static const struct device_operations host_ops = {
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .enable = host_enable,
+ .ops_pci = 0,
};
static const struct pci_driver northbridge_driver __pci_driver = {
- .ops = &host_ops,
- .vendor = PCI_VENDOR_ID_VIA,
- .device = PCI_DEVICE_ID_VIA_K8T890CE_0,
+ .ops = &host_ops,
+ .vendor = PCI_VENDOR_ID_VIA,
+ .device = PCI_DEVICE_ID_VIA_K8T890CE_0,
};
diff --git a/src/southbridge/via/k8t890/k8t890_host_ctrl.c b/src/southbridge/via/k8t890/k8t890_host_ctrl.c
index e3e358b7ca..8c9f41871c 100644
--- a/src/southbridge/via/k8t890/k8t890_host_ctrl.c
+++ b/src/southbridge/via/k8t890/k8t890_host_ctrl.c
@@ -78,16 +78,16 @@ static void host_ctrl_enable(struct device *dev)
dump_south(dev);
}
-static struct device_operations host_ctrl_ops = {
- .read_resources = pci_dev_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .enable = host_ctrl_enable,
- .ops_pci = 0,
+static const struct device_operations host_ctrl_ops = {
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .enable = host_ctrl_enable,
+ .ops_pci = 0,
};
static const struct pci_driver northbridge_driver __pci_driver = {
- .ops = &host_ctrl_ops,
- .vendor = PCI_VENDOR_ID_VIA,
- .device = PCI_DEVICE_ID_VIA_K8T890CE_2,
+ .ops = &host_ctrl_ops,
+ .vendor = PCI_VENDOR_ID_VIA,
+ .device = PCI_DEVICE_ID_VIA_K8T890CE_2,
};
diff --git a/src/southbridge/via/k8t890/k8t890_pcie.c b/src/southbridge/via/k8t890/k8t890_pcie.c
index 21acf16780..726d803873 100644
--- a/src/southbridge/via/k8t890/k8t890_pcie.c
+++ b/src/southbridge/via/k8t890/k8t890_pcie.c
@@ -21,10 +21,9 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pciexp.h>
-#include <device/pci_ops.h>
#include <device/pci_ids.h>
-void peg_init(struct device *dev)
+static void peg_init(struct device *dev)
{
u8 reg;
@@ -78,7 +77,7 @@ void peg_init(struct device *dev)
dump_south(dev);
}
-void pcie_init(struct device *dev)
+static void pcie_init(struct device *dev)
{
u8 reg;
@@ -113,52 +112,52 @@ void pcie_init(struct device *dev)
dump_south(dev);
}
-static struct device_operations peg_ops = {
- .read_resources = pci_bus_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_bus_enable_resources,
- .enable = peg_init,
- .scan_bus = pciexp_scan_bridge,
- .reset_bus = pci_bus_reset,
- .ops_pci = 0,
+static const struct device_operations peg_ops = {
+ .read_resources = pci_bus_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_bus_enable_resources,
+ .enable = peg_init,
+ .scan_bus = pciexp_scan_bridge,
+ .reset_bus = pci_bus_reset,
+ .ops_pci = 0,
};
-static struct device_operations pcie_ops = {
- .read_resources = pci_bus_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_bus_enable_resources,
- .enable = pcie_init,
- .scan_bus = pciexp_scan_bridge,
- .reset_bus = pci_bus_reset,
- .ops_pci = 0,
+static const struct device_operations pcie_ops = {
+ .read_resources = pci_bus_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_bus_enable_resources,
+ .enable = pcie_init,
+ .scan_bus = pciexp_scan_bridge,
+ .reset_bus = pci_bus_reset,
+ .ops_pci = 0,
};
static const struct pci_driver northbridge_driver __pci_driver = {
- .ops = &peg_ops,
- .vendor = PCI_VENDOR_ID_VIA,
- .device = PCI_DEVICE_ID_VIA_K8T890CE_PEG,
+ .ops = &peg_ops,
+ .vendor = PCI_VENDOR_ID_VIA,
+ .device = PCI_DEVICE_ID_VIA_K8T890CE_PEG,
};
static const struct pci_driver pcie_drvd3f0 __pci_driver = {
- .ops = &pcie_ops,
- .vendor = PCI_VENDOR_ID_VIA,
- .device = PCI_DEVICE_ID_VIA_K8T890CE_PEX0,
+ .ops = &pcie_ops,
+ .vendor = PCI_VENDOR_ID_VIA,
+ .device = PCI_DEVICE_ID_VIA_K8T890CE_PEX0,
};
static const struct pci_driver pcie_drvd3f1 __pci_driver = {
- .ops = &pcie_ops,
- .vendor = PCI_VENDOR_ID_VIA,
- .device = PCI_DEVICE_ID_VIA_K8T890CE_PEX1,
+ .ops = &pcie_ops,
+ .vendor = PCI_VENDOR_ID_VIA,
+ .device = PCI_DEVICE_ID_VIA_K8T890CE_PEX1,
};
static const struct pci_driver pcie_drvd3f2 __pci_driver = {
- .ops = &pcie_ops,
- .vendor = PCI_VENDOR_ID_VIA,
- .device = PCI_DEVICE_ID_VIA_K8T890CE_PEX2,
+ .ops = &pcie_ops,
+ .vendor = PCI_VENDOR_ID_VIA,
+ .device = PCI_DEVICE_ID_VIA_K8T890CE_PEX2,
};
static const struct pci_driver pcie_drvd3f3 __pci_driver = {
- .ops = &pcie_ops,
- .vendor = PCI_VENDOR_ID_VIA,
- .device = PCI_DEVICE_ID_VIA_K8T890CE_PEX3,
+ .ops = &pcie_ops,
+ .vendor = PCI_VENDOR_ID_VIA,
+ .device = PCI_DEVICE_ID_VIA_K8T890CE_PEX3,
};
diff --git a/src/southbridge/via/k8t890/k8t890_traf_ctrl.c b/src/southbridge/via/k8t890/k8t890_traf_ctrl.c
index 85ab5a0551..304dfaea7f 100644
--- a/src/southbridge/via/k8t890/k8t890_traf_ctrl.c
+++ b/src/southbridge/via/k8t890/k8t890_traf_ctrl.c
@@ -19,13 +19,11 @@
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <console/console.h>
-
#include "k8t890.h"
-void mmconfig_set_resources(device_t dev)
+static void mmconfig_set_resources(device_t dev)
{
struct resource *resource;
u8 reg;
@@ -106,16 +104,16 @@ static void traf_ctrl_enable(struct device *dev)
apic[4] = (data & 0xF0FFFF) | (K8T890_APIC_ID << 24);
}
-static struct device_operations traf_ctrl_ops = {
- .read_resources = apic_mmconfig_read_resources,
- .set_resources = mmconfig_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .enable = traf_ctrl_enable,
- .ops_pci = 0,
+static const struct device_operations traf_ctrl_ops = {
+ .read_resources = apic_mmconfig_read_resources,
+ .set_resources = mmconfig_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .enable = traf_ctrl_enable,
+ .ops_pci = 0,
};
static const struct pci_driver northbridge_driver __pci_driver = {
- .ops = &traf_ctrl_ops,
- .vendor = PCI_VENDOR_ID_VIA,
- .device = PCI_DEVICE_ID_VIA_K8T890CE_5,
+ .ops = &traf_ctrl_ops,
+ .vendor = PCI_VENDOR_ID_VIA,
+ .device = PCI_DEVICE_ID_VIA_K8T890CE_5,
};
diff --git a/src/southbridge/via/vt8237r/vt8237r.c b/src/southbridge/via/vt8237r/vt8237r.c
index 0d257d1f26..f87fc1a398 100644
--- a/src/southbridge/via/vt8237r/vt8237r.c
+++ b/src/southbridge/via/vt8237r/vt8237r.c
@@ -20,7 +20,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <pc80/keyboard.h>
#include "chip.h"
diff --git a/src/southbridge/via/vt8237r/vt8237r_bridge.c b/src/southbridge/via/vt8237r/vt8237r_bridge.c
index 8baaaf8f82..2077f3bb09 100644
--- a/src/southbridge/via/vt8237r/vt8237r_bridge.c
+++ b/src/southbridge/via/vt8237r/vt8237r_bridge.c
@@ -19,7 +19,6 @@
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <console/console.h>
diff --git a/src/southbridge/via/vt8237r/vt8237r_ide.c b/src/southbridge/via/vt8237r/vt8237r_ide.c
index 1496f83b33..9f6f3a7a70 100644
--- a/src/southbridge/via/vt8237r/vt8237r_ide.c
+++ b/src/southbridge/via/vt8237r/vt8237r_ide.c
@@ -21,7 +21,6 @@
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <console/console.h>
#include "vt8237r.h"
diff --git a/src/southbridge/via/vt8237r/vt8237r_lpc.c b/src/southbridge/via/vt8237r/vt8237r_lpc.c
index 5d2579e530..8d0fa3402f 100644
--- a/src/southbridge/via/vt8237r/vt8237r_lpc.c
+++ b/src/southbridge/via/vt8237r/vt8237r_lpc.c
@@ -23,7 +23,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <pc80/mc146818rtc.h>
#include <cpu/x86/lapic.h>
@@ -48,7 +47,7 @@
extern void dump_south(device_t dev);
-struct ioapicreg {
+static struct ioapicreg {
u32 reg;
u32 value_low;
u32 value_high;
@@ -146,7 +145,7 @@ static void pci_routing_fixup(struct device *dev)
* Set up the power management capabilities directly into ACPI mode.
* This avoids having to handle any System Management Interrupts (SMIs).
*/
-void setup_pm(device_t dev)
+static void setup_pm(device_t dev)
{
/* Debounce LID and PWRBTN# Inputs for 16ms. */
pci_write_config8(dev, 0x80, 0x20);
@@ -299,7 +298,7 @@ static void vt8237r_init(struct device *dev)
rtc_init(0);
}
-void vt8237r_read_resources(device_t dev)
+static void vt8237r_read_resources(device_t dev)
{
struct resource *res;
@@ -320,7 +319,7 @@ void vt8237r_read_resources(device_t dev)
* than standard PC I/O addresses), however it does control the ISA bus
* and so we need to manually call enable childrens resources on that bus.
*/
-void vt8237r_enable_resources(device_t dev)
+static void vt8237r_enable_resources(device_t dev)
{
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
diff --git a/src/southbridge/via/vt8237r/vt8237r_sata.c b/src/southbridge/via/vt8237r/vt8237r_sata.c
index 941887f812..1cf2976327 100644
--- a/src/southbridge/via/vt8237r/vt8237r_sata.c
+++ b/src/southbridge/via/vt8237r/vt8237r_sata.c
@@ -20,7 +20,6 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_ops.h>
#include <device/pci_ids.h>
#define SATA_MISC_CTRL 0x45