summaryrefslogtreecommitdiff
path: root/src/southbridge
diff options
context:
space:
mode:
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/common/firmware/Kconfig13
-rw-r--r--src/southbridge/intel/common/firmware/Makefile.inc3
2 files changed, 16 insertions, 0 deletions
diff --git a/src/southbridge/intel/common/firmware/Kconfig b/src/southbridge/intel/common/firmware/Kconfig
index da40db0fd1..f4be93cc07 100644
--- a/src/southbridge/intel/common/firmware/Kconfig
+++ b/src/southbridge/intel/common/firmware/Kconfig
@@ -58,6 +58,19 @@ config ME_BIN_PATH
default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/me.bin"
depends on HAVE_ME_BIN
+config CHECK_ME
+ bool "Verify the integrity of the supplied ME/TXE firmware"
+ default y
+ depends on HAVE_ME_BIN && (NORTHBRIDGE_INTEL_NEHALEM || \
+ NORTHBRIDGE_INTEL_SANDYBRIDGE || \
+ NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_HASWELL || \
+ SOC_INTEL_BROADWELL || SOC_INTEL_SKYLAKE || \
+ SOC_INTEL_BAYTRAIL || SOC_INTEL_BRASWELL)
+ help
+ Verify the integrity of the supplied Intel ME/TXE firmware before
+ proceeding with the build, in order to prevent an accidental loading
+ of a corrupted ME/TXE image.
+
config USE_ME_CLEANER
bool "Strip down the Intel ME/TXE firmware"
depends on HAVE_ME_BIN && (NORTHBRIDGE_INTEL_SANDYBRIDGE || \
diff --git a/src/southbridge/intel/common/firmware/Makefile.inc b/src/southbridge/intel/common/firmware/Makefile.inc
index 98a36d3b81..eb4c07e91d 100644
--- a/src/southbridge/intel/common/firmware/Makefile.inc
+++ b/src/southbridge/intel/common/firmware/Makefile.inc
@@ -58,6 +58,9 @@ ifeq ($(CONFIG_HAVE_ME_BIN),y)
$(obj)/coreboot.pre
mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre
endif
+ifeq ($(CONFIG_CHECK_ME),y)
+ util/me_cleaner/me_cleaner.py -c $(obj)/coreboot.pre > /dev/null
+endif
ifeq ($(CONFIG_USE_ME_CLEANER),y)
printf " ME_CLEANER coreboot.pre\n"
util/me_cleaner/me_cleaner.py $(obj)/coreboot.pre > \