diff options
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/amd/cimx/sb700/lpc.c | 5 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb800/lpc.c | 5 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb900/lpc.c | 5 | ||||
-rw-r--r-- | src/southbridge/amd/sb800/lpc.c | 4 | ||||
-rw-r--r-- | src/southbridge/amd/sb800/sm.c | 8 | ||||
-rw-r--r-- | src/southbridge/intel/sch/lpc.c | 5 |
6 files changed, 17 insertions, 15 deletions
diff --git a/src/southbridge/amd/cimx/sb700/lpc.c b/src/southbridge/amd/cimx/sb700/lpc.c index e43193a9c5..7157a5590a 100644 --- a/src/southbridge/amd/cimx/sb700/lpc.c +++ b/src/southbridge/amd/cimx/sb700/lpc.c @@ -21,6 +21,7 @@ #include "lpc.h" #include <bitops.h> #include <arch/io.h> +#include <arch/ioapic.h> #include <console/console.h> /* printk */ #include <cbmem.h> @@ -61,8 +62,8 @@ void lpc_read_resources(device_t dev) res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; - res = new_resource(dev, 3); /* IOAPIC */ - res->base = 0xfec00000; + res = new_resource(dev, 3); + res->base = IO_APIC_ADDR; res->size = 0x00001000; res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; diff --git a/src/southbridge/amd/cimx/sb800/lpc.c b/src/southbridge/amd/cimx/sb800/lpc.c index bc643b5e3c..856b8b32eb 100644 --- a/src/southbridge/amd/cimx/sb800/lpc.c +++ b/src/southbridge/amd/cimx/sb800/lpc.c @@ -19,6 +19,7 @@ #include <console/console.h> #include <device/pci.h> +#include <arch/ioapic.h> #include "lpc.h" @@ -45,8 +46,8 @@ void lpc_read_resources(device_t dev) res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; - res = new_resource(dev, 3); /* IOAPIC */ - res->base = 0xfec00000; + res = new_resource(dev, 3); + res->base = IO_APIC_ADDR; res->size = 0x00001000; res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; diff --git a/src/southbridge/amd/cimx/sb900/lpc.c b/src/southbridge/amd/cimx/sb900/lpc.c index 48bfe36556..9873d37a36 100644 --- a/src/southbridge/amd/cimx/sb900/lpc.c +++ b/src/southbridge/amd/cimx/sb900/lpc.c @@ -20,6 +20,7 @@ #include <device/pci.h> #include "lpc.h" #include <console/console.h> /* printk */ +#include <arch/ioapic.h> void lpc_read_resources(device_t dev) @@ -45,8 +46,8 @@ void lpc_read_resources(device_t dev) res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; - res = new_resource(dev, 3); /* IOAPIC */ - res->base = 0xfec00000; + res = new_resource(dev, 3); + res->base = IO_APIC_ADDR; res->size = 0x00001000; res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; diff --git a/src/southbridge/amd/sb800/lpc.c b/src/southbridge/amd/sb800/lpc.c index 6b72a62327..4e2031f9c5 100644 --- a/src/southbridge/amd/sb800/lpc.c +++ b/src/southbridge/amd/sb800/lpc.c @@ -91,8 +91,8 @@ static void sb800_lpc_read_resources(device_t dev) res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; - //res = new_resource(dev, 3); /* IOAPIC */ - //res->base = 0xfec00000; + //res = new_resource(dev, 3); + //res->base = IO_APIC_ADDR; //res->size = 0x00001000; //res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; diff --git a/src/southbridge/amd/sb800/sm.c b/src/southbridge/amd/sb800/sm.c index 9347c42f32..50a8f0bca7 100644 --- a/src/southbridge/amd/sb800/sm.c +++ b/src/southbridge/amd/sb800/sm.c @@ -84,16 +84,14 @@ static void sm_init(device_t dev) { u8 byte; - u32 ioapic_base; printk(BIOS_INFO, "sm_init().\n"); - ioapic_base = 0xFEC00000;//pci_read_config32(dev, 0x74) & (0xffffffe0); /* some like mem resource, but does not have enable bit */ /* Don't rename APIC ID */ /* TODO: We should call setup_ioapic() here. But kernel hangs if cpu is K8. * We need to check out why and change back. */ - clear_ioapic(ioapic_base); - //setup_ioapic(ioapic_base, 0); + clear_ioapic(IO_APIC_ADDR); + //setup_ioapic(IO_APIC_ADDR, 0); /* enable serial irq */ byte = pm_ioread(0x54); @@ -277,7 +275,7 @@ static void sb800_sm_read_resources(device_t dev) /* apic */ res = new_resource(dev, 0x74); - res->base = 0xfec00000; + res->base = IO_APIC_ADDR; res->size = 256 * 0x10; res->limit = 0xFEFFFFFUL; /* res->base + res->size -1; */ res->align = 8; diff --git a/src/southbridge/intel/sch/lpc.c b/src/southbridge/intel/sch/lpc.c index ab180bb713..977e01b4ba 100644 --- a/src/southbridge/intel/sch/lpc.c +++ b/src/southbridge/intel/sch/lpc.c @@ -23,6 +23,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <arch/io.h> +#include <arch/ioapic.h> #include "chip.h" /* SCH LPC defines */ @@ -164,8 +165,8 @@ static void sch_lpc_read_resources(device_t dev) res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; - res = new_resource(dev, 3); /* IOAPIC */ - res->base = 0xfec00000; + res = new_resource(dev, 3); + res->base = IO_APIC_ADDR; res->size = 0x00001000; res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } |