summaryrefslogtreecommitdiff
path: root/src/southbridge
diff options
context:
space:
mode:
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/bd82x6x/Makefile.inc9
-rw-r--r--src/southbridge/intel/bd82x6x/usb_ehci.c4
2 files changed, 7 insertions, 6 deletions
diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc
index a8dd7be4cc..c85151c5aa 100644
--- a/src/southbridge/intel/bd82x6x/Makefile.inc
+++ b/src/southbridge/intel/bd82x6x/Makefile.inc
@@ -46,10 +46,11 @@ romstage-y += reset.c
romstage-y += early_spi.c early_pch_common.c
romstage-y += early_rcba.c
-romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE_MRC) += early_me_mrc.c early_usb_mrc.c
-romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE_MRC) += early_me_mrc.c early_usb_mrc.c
-romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += early_thermal.c early_pch.c early_me.c early_usb.c
-romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += early_thermal.c early_pch.c early_me.c early_usb.c
+ifeq ($(CONFIG_USE_NATIVE_RAMINIT),y)
+romstage-y += early_thermal.c early_pch.c early_me.c early_usb.c
+else
+romstage-y += early_me_mrc.c early_usb_mrc.c
+endif
ramstage-y += madt.c
diff --git a/src/southbridge/intel/bd82x6x/usb_ehci.c b/src/southbridge/intel/bd82x6x/usb_ehci.c
index b7cd5f0633..c0cb1a9092 100644
--- a/src/southbridge/intel/bd82x6x/usb_ehci.c
+++ b/src/southbridge/intel/bd82x6x/usb_ehci.c
@@ -35,7 +35,7 @@ static void usb_ehci_init(struct device *dev)
printk(BIOS_DEBUG, "EHCI: Setting up controller.. ");
/* For others, done in MRC. */
-#if IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) || IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE)
+#if IS_ENABLED(CONFIG_USE_NATIVE_RAMINIT)
pci_write_config32(dev, 0x84, 0x930c8811);
pci_write_config32(dev, 0x88, 0x24000d30);
pci_write_config32(dev, 0xf4, 0x80408588);
@@ -50,7 +50,7 @@ static void usb_ehci_init(struct device *dev)
pci_write_config32(dev, PCI_COMMAND, reg32);
/* For others, done in MRC. */
-#if IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) || IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE)
+#if IS_ENABLED(CONFIG_USE_NATIVE_RAMINIT)
struct resource *res;
u8 access_cntl;