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-rw-r--r--src/southbridge/intel/fsp_rangeley/romstage.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.c b/src/southbridge/intel/fsp_rangeley/romstage.c
index 0032fd6715..ec60920ac5 100644
--- a/src/southbridge/intel/fsp_rangeley/romstage.c
+++ b/src/southbridge/intel/fsp_rangeley/romstage.c
@@ -20,7 +20,6 @@
#include <timestamp.h>
#include <arch/io.h>
#include <device/pci_def.h>
-#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
#include <cbmem.h>
#include <console/console.h>