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-rw-r--r--src/superio/fintek/f71863fg/Makefile.inc1
-rw-r--r--src/superio/fintek/f71863fg/early_serial.c48
-rw-r--r--src/superio/fintek/f71863fg/f71863fg.h2
3 files changed, 0 insertions, 51 deletions
diff --git a/src/superio/fintek/f71863fg/Makefile.inc b/src/superio/fintek/f71863fg/Makefile.inc
index 85ec530ccb..e48b93a3d4 100644
--- a/src/superio/fintek/f71863fg/Makefile.inc
+++ b/src/superio/fintek/f71863fg/Makefile.inc
@@ -18,5 +18,4 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-romstage-$(CONFIG_SUPERIO_FINTEK_F71863FG) += early_serial.c
ramstage-$(CONFIG_SUPERIO_FINTEK_F71863FG) += superio.c
diff --git a/src/superio/fintek/f71863fg/early_serial.c b/src/superio/fintek/f71863fg/early_serial.c
deleted file mode 100644
index 251f298c19..0000000000
--- a/src/superio/fintek/f71863fg/early_serial.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Corey Osgood <corey@slightlyhackish.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-/* Pre-RAM driver for the Fintek F71863FG Super I/O chip. */
-
-#include <arch/io.h>
-#include <device/pnp.h>
-#include "f71863fg.h"
-
-static void pnp_enter_conf_state(device_t dev)
-{
- u16 port = dev >> 8;
- outb(0x87, port);
- outb(0x87, port);
-}
-
-static void pnp_exit_conf_state(device_t dev)
-{
- u16 port = dev >> 8;
- outb(0xaa, port);
-}
-
-void f71863fg_enable_serial(device_t dev, u16 iobase)
-{
- pnp_enter_conf_state(dev);
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
- pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
- pnp_set_enable(dev, 1);
- pnp_exit_conf_state(dev);
-}
diff --git a/src/superio/fintek/f71863fg/f71863fg.h b/src/superio/fintek/f71863fg/f71863fg.h
index c29ddbe05e..a11e69f59b 100644
--- a/src/superio/fintek/f71863fg/f71863fg.h
+++ b/src/superio/fintek/f71863fg/f71863fg.h
@@ -33,6 +33,4 @@
#define F71863FG_SPI 0x08 /* SPI */
#define F71863FG_PME 0x0a /* Power Management Events (PME) and ACPI */
-void f71863fg_enable_serial(device_t dev, u16 iobase);
-
#endif /* SUPERIO_FINTEK_F71863FG_H */