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-rw-r--r--src/superio/winbond/w83627dhg/superio.c21
-rw-r--r--src/superio/winbond/w83627dhg/w83627dhg.h23
-rw-r--r--src/superio/winbond/w83627ehg/superio.c19
-rw-r--r--src/superio/winbond/w83627ehg/w83627ehg.h29
4 files changed, 59 insertions, 33 deletions
diff --git a/src/superio/winbond/w83627dhg/superio.c b/src/superio/winbond/w83627dhg/superio.c
index bc19297ea6..b10ff9781f 100644
--- a/src/superio/winbond/w83627dhg/superio.c
+++ b/src/superio/winbond/w83627dhg/superio.c
@@ -94,18 +94,21 @@ static struct device_operations ops = {
};
static struct pnp_info pnp_dev_info[] = {
- { &ops, W83627DHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x0ff8, 0}, },
- { &ops, W83627DHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x0ff8, 0}, },
- { &ops, W83627DHG_SP1, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
- { &ops, W83627DHG_SP2, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
- { &ops, W83627DHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x0fff, 0}, {0x0fff, 4}, },
+ { &ops, W83627DHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
+ { &ops, W83627DHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
+ { &ops, W83627DHG_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, W83627DHG_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, W83627DHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, },
/* the next line makes coreboot hang in pnp_enable_devices() */
- /* { &ops, W83627DHG_SPI, PNP_IO1, { 0xff8, 0 }, }, */
+ /* { &ops, W83627DHG_SPI, PNP_IO1, { 0x7f8, 0 }, }, */
{ &ops, W83627DHG_GPIO6, },
{ &ops, W83627DHG_WDTO_PLED, },
- { &ops, W83627DHG_GPIO2345, },
- { &ops, W83627DHG_ACPI, },
- { &ops, W83627DHG_HWM, PNP_IO0 | PNP_IRQ0, {0x0ffe, 0}, },
+ { &ops, W83627DHG_GPIO2, },
+ { &ops, W83627DHG_GPIO3, },
+ { &ops, W83627DHG_GPIO4, },
+ { &ops, W83627DHG_GPIO5, },
+ { &ops, W83627DHG_ACPI, PNP_IRQ0, },
+ { &ops, W83627DHG_HWM, PNP_IO0 | PNP_IRQ0, {0x07fe, 0}, },
{ &ops, W83627DHG_PECI_SST, },
};
diff --git a/src/superio/winbond/w83627dhg/w83627dhg.h b/src/superio/winbond/w83627dhg/w83627dhg.h
index 8a1668c4dc..74761e9884 100644
--- a/src/superio/winbond/w83627dhg/w83627dhg.h
+++ b/src/superio/winbond/w83627dhg/w83627dhg.h
@@ -25,13 +25,30 @@
#define W83627DHG_PP 1 /* Parallel port */
#define W83627DHG_SP1 2 /* Com1 */
#define W83627DHG_SP2 3 /* Com2 */
-#define W83627DHG_KBC 5 /* PS/2 keyboard + mouse */
+#define W83627DHG_KBC 5 /* PS/2 keyboard & mouse */
#define W83627DHG_SPI 6 /* Serial peripheral interface */
-#define W83627DHG_GPIO6 7 /* GPIO6 */
#define W83627DHG_WDTO_PLED 8 /* WDTO#, PLED */
-#define W83627DHG_GPIO2345 9 /* GPIO2, GPIO3, GPIO4, GPIO5 */
#define W83627DHG_ACPI 10 /* ACPI */
#define W83627DHG_HWM 11 /* Hardware monitor */
#define W83627DHG_PECI_SST 12 /* PECI, SST */
+/* The following are handled using "virtual LDNs" (hence the _V suffix). */
+#define W83627DHG_GPIO6_V 7 /* GPIO6 */
+#define W83627DHG_GPIO2345_V 9 /* GPIO2, GPIO3, GPIO4, GPIO5 */
+
+/*
+ * Virtual devices sharing the enables are encoded as follows:
+ * VLDN = baseLDN[7:0] | [10:8] bitpos of enable in 0x30 of baseLDN
+ */
+
+/* GPIO6 has bit 3 as enable (instead of bit 0 as usual). */
+#define W83627DHG_GPIO6 ((3 << 8) | W83627DHG_GPIO6_V)
+
+#define W83627DHG_GPIO2 ((0 << 8) | W83627DHG_GPIO2345_V)
+#define W83627DHG_GPIO3 ((1 << 8) | W83627DHG_GPIO2345_V)
+#define W83627DHG_GPIO4 ((2 << 8) | W83627DHG_GPIO2345_V)
+#define W83627DHG_GPIO5 ((3 << 8) | W83627DHG_GPIO2345_V)
+
+/* Note: There is no GPIO1 on the W83627DHG as per datasheet. */
+
#endif
diff --git a/src/superio/winbond/w83627ehg/superio.c b/src/superio/winbond/w83627ehg/superio.c
index 8bc8461ad2..1f1b681eaf 100644
--- a/src/superio/winbond/w83627ehg/superio.c
+++ b/src/superio/winbond/w83627ehg/superio.c
@@ -178,17 +178,18 @@ static struct device_operations ops = {
};
static struct pnp_info pnp_dev_info[] = {
- { &ops, W83627EHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
- { &ops, W83627EHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
- { &ops, W83627EHG_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, W83627EHG_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, W83627EHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, },
- { &ops, W83627EHG_SFI, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, W83627EHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
+ { &ops, W83627EHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
+ { &ops, W83627EHG_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, W83627EHG_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, W83627EHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, },
+ { &ops, W83627EHG_SFI, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
{ &ops, W83627EHG_WDTO_PLED, },
- { &ops, W83627EHG_ACPI, },
- { &ops, W83627EHG_HWM, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
+ { &ops, W83627EHG_ACPI, PNP_IRQ0, },
+ { &ops, W83627EHG_HWM, PNP_IO0 | PNP_IRQ0, {0x07fe, 0}, },
+
{ &ops, W83627EHG_GAME, PNP_IO0, {0x07ff, 0}, },
- { &ops, W83627EHG_MIDI, PNP_IO1 | PNP_IRQ0, {0x07ff, 0}, {0x07fe, 4}, },
+ { &ops, W83627EHG_MIDI, PNP_IO1 | PNP_IRQ0, {0x07fe, 4}, },
{ &ops, W83627EHG_GPIO1, },
{ &ops, W83627EHG_GPIO2, },
{ &ops, W83627EHG_GPIO3, },
diff --git a/src/superio/winbond/w83627ehg/w83627ehg.h b/src/superio/winbond/w83627ehg/w83627ehg.h
index 60c2b064b2..6d6d05db8b 100644
--- a/src/superio/winbond/w83627ehg/w83627ehg.h
+++ b/src/superio/winbond/w83627ehg/w83627ehg.h
@@ -27,27 +27,32 @@
#define W83627EHG_SP1 2 /* Com1 */
#define W83627EHG_SP2 3 /* Com2 */
#define W83627EHG_KBC 5 /* PS/2 keyboard & mouse */
-#define W83627EHG_GPIO_GAME_MIDI 7 /* GPIO1, GPIO6, Game port, MIDI port */
-#define W83627EHG_WDTO_PLED 8 /* TODO */
-#define W83627EHG_GPIO_SUSLED 9 /* GPIO2, GPIO3, GPIO4, GPIO5, SUSLED */
+#define W83627EHG_WDTO_PLED 8 /* Watchdog timer timeout, power LED */
#define W83627EHG_ACPI 10 /* ACPI */
#define W83627EHG_HWM 11 /* Hardware monitor */
+/* The following are handled using "virtual LDNs" (hence the _V suffix). */
+#define W83627EHG_SFI_V 6 /* Serial flash interface (SFI) */
+#define W83627EHG_GPIO_GAME_MIDI_V 7 /* GPIO1, GPIO6, game port, MIDI */
+#define W83627EHG_GPIO_SUSLED_V 9 /* GPIO2, GPIO3, GPIO4, GPIO5, SUSLED */
+
/*
* Virtual devices sharing the enables are encoded as follows:
* VLDN = baseLDN[7:0] | [10:8] bitpos of enable in 0x30 of baseLDN
*/
-#define W83627EHG_SFI ((1 << 8) | 6) /* Flash has bit1 as enable */
-#define W83627EHG_GPIO1 W83627EHG_GPIO_GAME_MIDI /* GPIO1: LDN 7, bit 0 */
-#define W83627EHG_GAME ((1 << 8) | 7)
-#define W83627EHG_MIDI ((2 << 8) | 7)
-#define W83627EHG_GPIO6 ((3 << 8) | 7)
+/* SFI has bit 1 as enable (instead of bit 0 as usual). */
+#define W83627EHG_SFI ((1 << 8) | W83627EHG_SFI_V)
+
+#define W83627EHG_GPIO1 ((0 << 8) | W83627EHG_GPIO_GAME_MIDI_V)
+#define W83627EHG_GAME ((1 << 8) | W83627EHG_GPIO_GAME_MIDI_V)
+#define W83627EHG_MIDI ((2 << 8) | W83627EHG_GPIO_GAME_MIDI_V)
+#define W83627EHG_GPIO6 ((3 << 8) | W83627EHG_GPIO_GAME_MIDI_V)
-#define W83627EHG_GPIO2 W83627EHG_GPIO_SUSLED /* GPIO2: LDN 9, bit 0 */
-#define W83627EHG_GPIO3 ((1 << 8) | 9)
-#define W83627EHG_GPIO4 ((2 << 8) | 9)
-#define W83627EHG_GPIO5 ((3 << 8) | 9)
+#define W83627EHG_GPIO2 ((0 << 8) | W83627EHG_GPIO_SUSLED_V)
+#define W83627EHG_GPIO3 ((1 << 8) | W83627EHG_GPIO_SUSLED_V)
+#define W83627EHG_GPIO4 ((2 << 8) | W83627EHG_GPIO_SUSLED_V)
+#define W83627EHG_GPIO5 ((3 << 8) | W83627EHG_GPIO_SUSLED_V)
#if defined(__PRE_RAM__) && !defined(__ROMCC__)
void w83627ehg_enable_dev(device_t dev, u16 iobase);
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-01 23:16:05 +0000