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Diffstat (limited to 'src/vendorcode/amd/agesa/f14/Include/PlatformInstall.h')
-rw-r--r--src/vendorcode/amd/agesa/f14/Include/PlatformInstall.h247
1 files changed, 2 insertions, 245 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Include/PlatformInstall.h b/src/vendorcode/amd/agesa/f14/Include/PlatformInstall.h
index 6e54aa902f..8092ad2a47 100644
--- a/src/vendorcode/amd/agesa/f14/Include/PlatformInstall.h
+++ b/src/vendorcode/amd/agesa/f14/Include/PlatformInstall.h
@@ -51,31 +51,6 @@
*
****************************************************************************/
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image. Turn these on in your option c file, not
- * here.
- */
-// #define AGESA_ENTRY_INIT_RESET TRUE
-// #define AGESA_ENTRY_INIT_RECOVERY TRUE
-// #define AGESA_ENTRY_INIT_EARLY TRUE
-// #define AGESA_ENTRY_INIT_POST TRUE
-// #define AGESA_ENTRY_INIT_ENV TRUE
-// #define AGESA_ENTRY_INIT_MID TRUE
-// #define AGESA_ENTRY_INIT_LATE TRUE
-// #define AGESA_ENTRY_INIT_S3SAVE TRUE
-// #define AGESA_ENTRY_INIT_RESUME TRUE
-// #define AGESA_ENTRY_INIT_LATE_RESTORE TRUE
-// #define AGESA_ENTRY_INIT_GENERAL_SERVICES TRUE
-
-/* Defaults for private/internal build control settings */
-/* Available options for image builds.
- *
- * As part of the image build for each image, define the options below to select the
- * AGESA entry points included in that image.
- */
-
VOLATILE AMD_MODULE_HEADER mCpuModuleID = {
//ModuleHeaderSignature
// Remove 'DOM$' as temp solution before update BinUtil.exe ,
@@ -90,62 +65,6 @@ VOLATILE AMD_MODULE_HEADER mCpuModuleID = {
NULL
};
-/* Process user desired AGESA entry points */
-#ifndef AGESA_ENTRY_INIT_RESET
- #define AGESA_ENTRY_INIT_RESET FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RECOVERY
- #define AGESA_ENTRY_INIT_RECOVERY FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_EARLY
- #define AGESA_ENTRY_INIT_EARLY FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_POST
- #define AGESA_ENTRY_INIT_POST FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_ENV
- #define AGESA_ENTRY_INIT_ENV FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_MID
- #define AGESA_ENTRY_INIT_MID FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE
- #define AGESA_ENTRY_INIT_LATE FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_S3SAVE
- #define AGESA_ENTRY_INIT_S3SAVE FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_RESUME
- #define AGESA_ENTRY_INIT_RESUME FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_LATE_RESTORE
- #define AGESA_ENTRY_INIT_LATE_RESTORE FALSE
-#endif
-
-#ifndef AGESA_ENTRY_INIT_GENERAL_SERVICES
- #define AGESA_ENTRY_INIT_GENERAL_SERVICES FALSE
-#endif
-
-/* Default the late AP entry point to off. It can be enabled
- by any family that may need the late AP functionality, or
- by any feature code that may need it. The IBVs no longer
- have control over this entry point. */
-#ifdef AGESA_ENTRY_LATE_RUN_AP_TASK
- #undef AGESA_ENTRY_LATE_RUN_AP_TASK
-#endif
-#define AGESA_ENTRY_LATE_RUN_AP_TASK FALSE
-
-
-
/* Process solution defined socket / family installations
*
* As part of the release package for each image, define the options below to select the
@@ -2180,6 +2099,8 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
* Include the structure definitions for the defaults table structures
*
****************************************************************************/
+#include <CommonReturns.h>
+#include <agesa-entry-cfg.h>
#include "Options.h"
#include "OptionCpuFamiliesInstall.h"
#include "OptionsHt.h"
@@ -2353,170 +2274,6 @@ BUILD_OPT_CFG UserOptions = {
0, //reserved...
};
-CONST FUNCTION_PARAMS_INFO ROMDATA FuncParamsInfo[] =
-{
- #if AGESA_ENTRY_INIT_RESET == TRUE
- { AMD_INIT_RESET,
- sizeof (AMD_RESET_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitResetConstructor,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_RESET_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_RECOVERY == TRUE
- { AMD_INIT_RECOVERY,
- sizeof (AMD_RECOVERY_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitRecoveryInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_POST_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_EARLY == TRUE
- { AMD_INIT_EARLY,
- sizeof (AMD_EARLY_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitEarlyInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_EARLY_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_ENV == TRUE
- { AMD_INIT_ENV,
- sizeof (AMD_ENV_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitEnvInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_ENV_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE == TRUE
- { AMD_INIT_LATE,
- sizeof (AMD_LATE_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitLateInitializer,
- (PF_AGESA_DESTRUCTOR) AmdInitLateDestructor,
- AMD_INIT_LATE_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_MID == TRUE
- { AMD_INIT_MID,
- sizeof (AMD_MID_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitMidInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_INIT_MID_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_POST == TRUE
- { AMD_INIT_POST,
- sizeof (AMD_POST_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitPostInitializer,
- (PF_AGESA_DESTRUCTOR) AmdInitPostDestructor,
- AMD_INIT_POST_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_RESUME == TRUE
- { AMD_INIT_RESUME,
- sizeof (AMD_RESUME_PARAMS),
- (PF_AGESA_FUNCTION) AmdInitResumeInitializer,
- (PF_AGESA_DESTRUCTOR) AmdInitResumeDestructor,
- AMD_INIT_RESUME_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
- { AMD_S3LATE_RESTORE,
- sizeof (AMD_S3LATE_PARAMS),
- (PF_AGESA_FUNCTION) AmdS3LateRestoreInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_S3_LATE_RESTORE_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_INIT_S3SAVE == TRUE
- { AMD_S3_SAVE,
- sizeof (AMD_S3SAVE_PARAMS),
- (PF_AGESA_FUNCTION) AmdS3SaveInitializer,
- (PF_AGESA_DESTRUCTOR) AmdS3SaveDestructor,
- AMD_S3_SAVE_HANDLE
- },
- #endif
-
- #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
- { AMD_LATE_RUN_AP_TASK,
- sizeof (AP_EXE_PARAMS),
- (PF_AGESA_FUNCTION) AmdLateRunApTaskInitializer,
- (PF_AGESA_DESTRUCTOR) CommonReturnAgesaSuccess,
- AMD_LATE_RUN_AP_TASK_HANDLE
- },
- #endif
- { 0, 0, NULL }
-};
-
-CONST UINTN InitializerCount = ((sizeof (FuncParamsInfo)) / (sizeof (FuncParamsInfo[0])));
-
-CONST DISPATCH_TABLE ROMDATA DispatchTable[] =
-{
- { AMD_CREATE_STRUCT, (IMAGE_ENTRY)AmdCreateStruct },
- { AMD_RELEASE_STRUCT, (IMAGE_ENTRY)AmdReleaseStruct },
-
- #if AGESA_ENTRY_INIT_RESET == TRUE
- { AMD_INIT_RESET, (IMAGE_ENTRY)AmdInitReset },
- #endif
-
- #if AGESA_ENTRY_INIT_RECOVERY == TRUE
- { AMD_INIT_RECOVERY, (IMAGE_ENTRY)AmdInitRecovery },
- #endif
-
- #if AGESA_ENTRY_INIT_EARLY == TRUE
- { AMD_INIT_EARLY, (IMAGE_ENTRY)AmdInitEarly },
- #endif
-
- #if AGESA_ENTRY_INIT_POST == TRUE
- { AMD_INIT_POST, (IMAGE_ENTRY)AmdInitPost },
- #endif
-
- #if AGESA_ENTRY_INIT_ENV == TRUE
- { AMD_INIT_ENV, (IMAGE_ENTRY)AmdInitEnv },
- #endif
-
- #if AGESA_ENTRY_INIT_MID == TRUE
- { AMD_INIT_MID, (IMAGE_ENTRY)AmdInitMid },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE == TRUE
- { AMD_INIT_LATE, (IMAGE_ENTRY)AmdInitLate },
- #endif
-
- #if AGESA_ENTRY_INIT_S3SAVE == TRUE
- { AMD_S3_SAVE, (IMAGE_ENTRY)AmdS3Save },
- #endif
-
- #if AGESA_ENTRY_INIT_RESUME == TRUE
- { AMD_INIT_RESUME, (IMAGE_ENTRY)AmdInitResume },
- #endif
-
- #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
- { AMD_S3LATE_RESTORE, (IMAGE_ENTRY)AmdS3LateRestore },
- #endif
-
- #if AGESA_ENTRY_INIT_GENERAL_SERVICES == TRUE
- { AMD_GET_APIC_ID, (IMAGE_ENTRY)AmdGetApicId },
- { AMD_GET_PCI_ADDRESS, (IMAGE_ENTRY)AmdGetPciAddress },
- { AMD_IDENTIFY_CORE, (IMAGE_ENTRY)AmdIdentifyCore },
- { AMD_READ_EVENT_LOG, (IMAGE_ENTRY)AmdReadEventLog },
- { AMD_IDENTIFY_DIMMS, (IMAGE_ENTRY)AmdIdentifyDimm },
- { AMD_GET_EXECACHE_SIZE, (IMAGE_ENTRY)AmdGetAvailableExeCacheSize },
- #endif
-
- #if AGESA_ENTRY_LATE_RUN_AP_TASK == TRUE
- { AMD_LATE_RUN_AP_TASK, (IMAGE_ENTRY)AmdLateRunApTask },
- #endif
- { 0, NULL }
-};
CONST DISPATCH_TABLE ROMDATA ApDispatchTable[] =
{