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path: root/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10RevDHtAssist.c
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Diffstat (limited to 'src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10RevDHtAssist.c')
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10RevDHtAssist.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10RevDHtAssist.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10RevDHtAssist.c
index 33f7e040a5..ec7b09be6d 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10RevDHtAssist.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevD/F10RevDHtAssist.c
@@ -324,11 +324,11 @@ F10HookDisableCache (
IN AMD_CONFIG_PARAMS *StdHeader
)
{
- UINT64 MsrRegister;
+ UINT64 MsrReg;
- LibAmdMsrRead (MSR_BU_CFG2, &MsrRegister, StdHeader);
- MsrRegister |= BIT42;
- LibAmdMsrWrite (MSR_BU_CFG2, &MsrRegister, StdHeader);
+ LibAmdMsrRead (MSR_BU_CFG2, &MsrReg, StdHeader);
+ MsrReg |= BIT42;
+ LibAmdMsrWrite (MSR_BU_CFG2, &MsrReg, StdHeader);
}