diff options
Diffstat (limited to 'src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnEquivalenceTable.c')
| -rw-r--r-- | src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnEquivalenceTable.c | 125 |
1 files changed, 125 insertions, 0 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnEquivalenceTable.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnEquivalenceTable.c new file mode 100644 index 0000000000..3cadf73fc8 --- /dev/null +++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x14/ON/F14OnEquivalenceTable.c @@ -0,0 +1,125 @@ +/* $NoKeywords:$ */ +/** + * @file + * + * AMD Family_14 Ontario Equivalence Table related data + * + * @xrefitem bom "File Content Label" "Release Content" + * @e project: AGESA + * @e sub-project: CPU/Family/0x14 + * @e \$Revision: 36418 $ @e \$Date: 2010-08-18 17:00:58 +0800 (Wed, 18 Aug 2010) $ + * + */ +/* + ***************************************************************************** + * + * Copyright (c) 2011, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * *************************************************************************** + * + */ + +/*---------------------------------------------------------------------------------------- + * M O D U L E S U S E D + *---------------------------------------------------------------------------------------- + */ +#include "AGESA.h" +#include "cpuFamilyTranslation.h" +#include "Filecode.h" +#include "amdlib.h" +#include "cpuRegisters.h" +#define FILECODE PROC_CPU_FAMILY_0X14_ON_F14ONEQUIVALENCETABLE_FILECODE + +/*---------------------------------------------------------------------------------------- + * D E F I N I T I O N S A N D M A C R O S + *---------------------------------------------------------------------------------------- + */ + +/*---------------------------------------------------------------------------------------- + * T Y P E D E F S A N D S T R U C T U R E S + *---------------------------------------------------------------------------------------- + */ + +/*---------------------------------------------------------------------------------------- + * P R O T O T Y P E S O F L O C A L F U N C T I O N S + *---------------------------------------------------------------------------------------- + */ + +/*---------------------------------------------------------------------------------------- + * E X P O R T E D F U N C T I O N S + *---------------------------------------------------------------------------------------- + */ + +STATIC CONST UINT16 ROMDATA CpuF14MicrocodeEquivalenceTable[] = +{ + 0x5000, 0x5000, + 0x5001, 0x5001, + 0x5010, 0x5010 +}; + +// Unencrypted equivalent +STATIC CONST UINT16 ROMDATA CpuF14UnEncryptedMicrocodeEquivalenceTable[] = +{ + 0x5000, 0x5800, + 0x5001, 0x5801, + 0x5010, 0x5810 +}; + + +/*---------------------------------------------------------------------------------------*/ +/** + * Returns the appropriate microcode patch equivalent ID table. + * + * @CpuServiceMethod{::F_CPU_GET_FAMILY_SPECIFIC_ARRAY}. + * + * @param[in] FamilySpecificServices The current Family Specific Services. + * @param[out] OnEquivalenceTablePtr Points to the first entry in the table. + * @param[out] NumberOfElements Number of valid entries in the table. + * @param[in] StdHeader Header for library and services. + * + */ +VOID +GetF14OnMicrocodeEquivalenceTable ( + IN CPU_SPECIFIC_SERVICES *FamilySpecificServices, + OUT CONST VOID **OnEquivalenceTablePtr, + OUT UINT8 *NumberOfElements, + IN AMD_CONFIG_PARAMS *StdHeader + ) +{ + UINT64 MsrMeCfg; + + LibAmdMsrRead (MSR_ME_CFG, &MsrMeCfg, StdHeader); + if ((MsrMeCfg & 0x1000) == 0) { + *NumberOfElements = ((sizeof (CpuF14UnEncryptedMicrocodeEquivalenceTable) / sizeof (UINT16)) / 2); + *OnEquivalenceTablePtr = CpuF14UnEncryptedMicrocodeEquivalenceTable; + } else { + *NumberOfElements = ((sizeof (CpuF14MicrocodeEquivalenceTable) / sizeof (UINT16)) / 2); + *OnEquivalenceTablePtr = CpuF14MicrocodeEquivalenceTable; + } +} + + + |