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Diffstat (limited to 'src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbPowerMgmt.h')
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbPowerMgmt.h52
1 files changed, 47 insertions, 5 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbPowerMgmt.h b/src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbPowerMgmt.h
index bb5a54904c..b3dd12cfb6 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbPowerMgmt.h
+++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbPowerMgmt.h
@@ -48,11 +48,6 @@
#define _NBPOWERMGMT_H_
-AGESA_STATUS
-NbInitPowerManagement (
- IN GNB_PLATFORM_CONFIG *Gnb
- );
-
///Control structure for clock gating feature
typedef struct {
BOOLEAN Smu_Sclk_Gating; ///<Control Smu SClk gating 1 Enable 0 Disable
@@ -67,4 +62,51 @@ typedef struct {
BOOLEAN Dce_Dispclk_Gating; ///<Control DCE dispaly gating 1 Enable 0 Disable
} NB_CLK_GATING_CTRL;
+AGESA_STATUS
+NbInitPowerManagement (
+ IN GNB_PLATFORM_CONFIG *Gnb
+ );
+
+VOID
+NbInitSmuClockGating (
+ IN NB_CLK_GATING_CTRL *NbClkGatingCtrl,
+ IN GNB_PLATFORM_CONFIG *Gnb
+ );
+
+VOID
+NbInitOrbClockGating (
+ IN NB_CLK_GATING_CTRL *NbClkGatingCtrl,
+ IN GNB_PLATFORM_CONFIG *Gnb
+ );
+
+VOID
+NbInitIocClockGating (
+ IN NB_CLK_GATING_CTRL *NbClkGatingCtrl,
+ IN GNB_PLATFORM_CONFIG *Gnb
+ );
+
+VOID
+NbInitBifClockGating (
+ IN NB_CLK_GATING_CTRL *NbClkGatingCtrl,
+ IN GNB_PLATFORM_CONFIG *Gnb
+ );
+
+VOID
+NbInitGmcClockGating (
+ IN NB_CLK_GATING_CTRL *NbClkGatingCtrl,
+ IN GNB_PLATFORM_CONFIG *Gnb
+ );
+
+VOID
+NbInitDceSclkClockGating (
+ IN NB_CLK_GATING_CTRL *NbClkGatingCtrl,
+ IN GNB_PLATFORM_CONFIG *Gnb
+ );
+
+VOID
+NbInitDceDisplayClockGating (
+ IN NB_CLK_GATING_CTRL *NbClkGatingCtrl,
+ IN GNB_PLATFORM_CONFIG *Gnb
+ );
+
#endif