1 files changed, 12 insertions, 0 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PciePortLateInit.c b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PciePortLateInit.c
index e3a2b5ab21..27bf2934e1 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PciePortLateInit.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/PciePortLateInit.c
@@ -77,6 +77,18 @@
  *----------------------------------------------------------------------------------------
  */
 
+VOID
+PcieSlotPowerLimit (
+  IN      PCIe_ENGINE_CONFIG    *Engine,
+  IN      PCIe_PLATFORM_CONFIG  *Pcie
+  );
+
+AGESA_STATUS
+PciePortLateInit (
+  IN       PCIe_PLATFORM_CONFIG  *Pcie
+  );
+
+
 PCIE_PORT_REGISTER_ENTRY PortLateInitTable [] = {
   {
     DxF0xE4_xA2_ADDRESS,