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Diffstat (limited to 'src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/mru.h')
| -rw-r--r-- | src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/mru.h | 140 |
1 files changed, 140 insertions, 0 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/mru.h b/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/mru.h new file mode 100644 index 0000000000..27ba3368ce --- /dev/null +++ b/src/vendorcode/amd/agesa/f14/Proc/Recovery/Mem/mru.h @@ -0,0 +1,140 @@ +/* $NoKeywords:$ */ +/** + * @file + * + * mru.h + * + * Utility support Recovery + * + * @xrefitem bom "File Content Label" "Release Content" + * @e project: AGESA + * @e sub-project: (Proc/Recovery/Mem) + * @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $ + * + **/ +/* + ***************************************************************************** + * + * Copyright (c) 2011, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * *************************************************************************** + * + */ + +#ifndef _MRU_H_ +#define _MRU_H_ + +/*---------------------------------------------------------------------------- + * Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS) + * + *---------------------------------------------------------------------------- + */ + +/*----------------------------------------------------------------------------- + * DEFINITIONS AND MACROS + * + *----------------------------------------------------------------------------- + */ +#ifndef PSO_ENTRY + #define PSO_ENTRY UINT8 +#endif + +/*---------------------------------------------------------------------------- + * TYPEDEFS, STRUCTURES, ENUMS + * + *---------------------------------------------------------------------------- + */ + +/// Test patterns for DQS training +typedef enum { + TestPattern0, ///< Test pattern used in first pass of receiver enable training + TestPattern1, ///< Test pattern used in first pass of receiver enable training + TestPattern2, ///< Test pattern used in second pass of receiver enable training + TestPatternJD1B, ///< 72-bit test pattern used in position training (ganged mode) + TestPatternJD1A, ///< 72-bit test pattern used in position training + TestPatternML ///< Test pattern used in first pass of max latency training +} TRAIN_PATTERN; + +/*---------------------------------------------------------------------------- + * FUNCTIONS PROTOTYPE + * + *---------------------------------------------------------------------------- + */ +VOID +MemRecUWrite1CL ( + IN UINT32 Address, + IN UINT8 Pattern[] + ); + +VOID +MemRecURead1CL ( + IN UINT8 Buffer[], + IN UINT32 Address + ); + +VOID +MemRecUFlushPattern ( + IN UINT32 Address + ); + +VOID +MemRecUFillTrainPattern ( + IN TRAIN_PATTERN Pattern, + IN UINT8 Buffer[], + IN UINT16 Size, + IN AMD_CONFIG_PARAMS *StdHeader + ); + +VOID +MemRecUProcIOClFlush ( + IN UINT32 Address, + IN OUT MEM_DATA_STRUCT *MemPtr + ); + +VOID +MemRecUWait10ns ( + IN UINT32 Count, + IN OUT MEM_DATA_STRUCT *MemPtr + ); + +VOID * +MemRecFindPSOverrideEntry ( + IN PSO_TABLE *PlatformMemoryConfiguration, + IN PSO_ENTRY EntryType, + IN UINT8 SocketID, + IN UINT8 ChannelID + ); + +UINT8 +RecGetMaxDimmsPerChannel ( + IN PSO_TABLE *PlatformMemoryConfiguration, + IN UINT8 SocketID, + IN UINT8 ChannelID + ); + +#endif /* _MRU_H_ */ + + |