1 files changed, 1 insertions, 1 deletions
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mtthrcSeedTrain.c b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mtthrcSeedTrain.c
index 3406d76306..991667bca2 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mtthrcSeedTrain.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/mtthrcSeedTrain.c
@@ -313,7 +313,6 @@ MemTRdPosWithRxEnDlySeeds3 (
       //
       IDS_HDT_CONSOLE (MEM_FLOW, "\n\t\t Setting PassTestRxEnDly\n");
       IDS_HDT_CONSOLE (MEM_FLOW, "\t  PassTestRxEnDly: ");
-      PassTestRxEnDly[ByteLane] = RxOrig[ByteLane];
       for (ByteLane = 0; ByteLane < MaxByteLanes; ByteLane++) {
         if (RxEnDlyTargetFound[ByteLane] == FALSE) {
           // Calculate "PassTestRxEnDly" from  current "RxEnDly"
@@ -328,6 +327,7 @@ MemTRdPosWithRxEnDlySeeds3 (
             MemTRdPosRxEnSeedSetDly3 (TechPtr, PassTestRxEnDly[ByteLane], ByteLane);
             OutOfRange[ByteLane] = FALSE;
           } else {
+            PassTestRxEnDly[ByteLane] = RxOrig[ByteLane];
             OutOfRange[ByteLane] = TRUE;
           }
         } else {