diff options
Diffstat (limited to 'src/vendorcode/amd/agesa/f15tn/Proc')
7 files changed, 13 insertions, 13 deletions
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.c b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.c index 2e454714d6..f28159363b 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.c @@ -155,7 +155,7 @@ HeapManagerInit ( GetCpuServicesOfCurrentCore ((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader); FamilySpecificServices->GetCacheInfo (FamilySpecificServices, (CONST VOID **) &CacheInfoPtr, &Ignored, StdHeader); - HeapBufferPtr = (UINT8 *)(UINT32) StdHeader->HeapBasePtr; + HeapBufferPtr = (UINT8 *)(UINTN) StdHeader->HeapBasePtr; // Check whether the heap manager is already initialized LibAmdMsrRead (AMD_MTRR_VARIABLE_HEAP_MASK, &MsrData, StdHeader); @@ -325,14 +325,14 @@ HeapAllocateBuffer ( // Check Heap database is valid if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // The base address in StdHeader is incorrect, get base address by itself - BaseAddress = (UINT8 *)(UINT32) HeapGetBaseAddress (StdHeader); + BaseAddress = (UINT8 *)(UINTN) HeapGetBaseAddress (StdHeader); HeapManager = (HEAP_MANAGER *) BaseAddress; if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // Heap is not available, ASSERT here ASSERT (FALSE); return AGESA_ERROR; } - StdHeader->HeapBasePtr = (UINT64)(UINT32) BaseAddress; + StdHeader->HeapBasePtr = (UINTN)BaseAddress; } // Allocate @@ -470,14 +470,14 @@ HeapDeallocateBuffer ( // Check Heap database is valid if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // The base address in StdHeader is incorrect, get base address by itself - BaseAddress = (UINT8 *)(UINT32) HeapGetBaseAddress (StdHeader); + BaseAddress = (UINT8 *)(UINTN) HeapGetBaseAddress (StdHeader); HeapManager = (HEAP_MANAGER *) BaseAddress; if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // Heap is not available, ASSERT here ASSERT (FALSE); return AGESA_ERROR; } - StdHeader->HeapBasePtr = (UINT64)(UINT32) BaseAddress; + StdHeader->HeapBasePtr = (UINTN)BaseAddress; } OffsetOfPreviousNode = AMD_HEAP_INVALID_HEAP_OFFSET; @@ -599,14 +599,14 @@ HeapLocateBuffer ( // Check Heap database is valid if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // The base address in StdHeader is incorrect, get base address by itself - BaseAddress = (UINT8 *)(UINT32) HeapGetBaseAddress (StdHeader); + BaseAddress = (UINT8 *)(UINTN) HeapGetBaseAddress (StdHeader); HeapManager = (HEAP_MANAGER *) BaseAddress; if ((BaseAddress == NULL) || (HeapManager->Signature != HEAP_SIGNATURE_VALID)) { // Heap is not available, ASSERT here ASSERT (FALSE); return AGESA_ERROR; } - StdHeader->HeapBasePtr = (UINT64)(UINT32) BaseAddress; + StdHeader->HeapBasePtr = (UINTN)BaseAddress; } OffsetOfCurrentNode = HeapManager->FirstActiveBufferOffset; CurrentNode = (BUFFER_NODE *) (BaseAddress + OffsetOfCurrentNode); diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdS3LateRestore.c b/src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdS3LateRestore.c index fb8edd9835..2f23a7ab7e 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdS3LateRestore.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/Common/AmdS3LateRestore.c @@ -119,7 +119,7 @@ AmdS3LateRestore ( ASSERT (S3LateParams != NULL); BufferPointer = (UINT8 *) S3LateParams->S3DataBlock.VolatileStorage; - S3LateParams->StdHeader.HeapBasePtr = (UINT32) &BufferPointer[((S3_VOLATILE_STORAGE_HEADER *) S3LateParams->S3DataBlock.VolatileStorage)->HeapOffset]; + S3LateParams->StdHeader.HeapBasePtr = (UINTN) &BufferPointer[((S3_VOLATILE_STORAGE_HEADER *) S3LateParams->S3DataBlock.VolatileStorage)->HeapOffset]; ASSERT (S3LateParams->StdHeader.HeapBasePtr != 0); IDS_HDT_CONSOLE_INIT (&S3LateParams->StdHeader); diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbGfx.h b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbGfx.h index 1a934eb916..ac3318ab95 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbGfx.h +++ b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbGfx.h @@ -125,7 +125,7 @@ typedef enum { /// Graphics Platform Configuration typedef struct { - UINT32 StdHeader; ///< Standard Header TODO: Used to be PVOID + UINTN StdHeader; ///< Standard Header TODO: Used to be PVOID PCI_ADDR GfxPciAddress; ///< Graphics PCI Address UMA_INFO UmaInfo; ///< UMA Information UINT32 GmmBase; ///< GMM Base diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbPcie.h b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbPcie.h index b25c50c7b3..e8194f8202 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbPcie.h +++ b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Common/GnbPcie.h @@ -355,7 +355,7 @@ typedef struct { /// PCIe platform configuration info typedef struct { PCIe_DESCRIPTOR_HEADER Header; ///< Descrptor Header - UINT32 StdHeader; ///< Standard configuration header TODO:Used to be PVOID + UINTN StdHeader; ///< Standard configuration header TODO:Used to be PVOID UINT32 LinkReceiverDetectionPooling; ///< Receiver pooling detection time in us. UINT32 LinkL0Pooling; ///< Pooling for link to get to L0 in us UINT32 LinkGpioResetAssertionTime; ///< Gpio reset assertion time in us diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigLib.c b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigLib.c index b822294573..8befb2cd5e 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigLib.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigLib.c @@ -183,7 +183,7 @@ GfxLocateConfigData ( IDS_ERROR_TRAP; return AGESA_FATAL; } - (*Gfx)->StdHeader = /* (PVOID) */(UINT32) StdHeader; + (*Gfx)->StdHeader = /* (PVOID) */(UINTN)StdHeader; return AGESA_SUCCESS; } diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c index 49fd4cb7de..f0fe7f86a5 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c @@ -113,7 +113,7 @@ GfxConfigPostInterface ( Gfx->GfxControllerMode = GfxControllerLegacyBridgeMode; Gfx->GfxPciAddress.AddressValue = MAKE_SBDFO (0, 1, 5, 0, 0); } - Gfx->StdHeader = /* (PVOID) */(UINT32) StdHeader; + Gfx->StdHeader = /* (PVOID) */(UINTN) StdHeader; Gfx->GnbHdAudio = PostParamsPtr->PlatformConfig.GnbHdAudio; Gfx->AbmSupport = PostParamsPtr->PlatformConfig.AbmSupport; Gfx->DynamicRefreshRate = PostParamsPtr->PlatformConfig.DynamicRefreshRate; diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c index 0719e5256e..f66fd9b419 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c @@ -432,7 +432,7 @@ PcieLocateConfigurationData ( IDS_ERROR_TRAP; return AGESA_FATAL; } - (*Pcie)->StdHeader = /* (PVOID) */ (UINT32)StdHeader; + (*Pcie)->StdHeader = /* (PVOID) */ (UINTN)StdHeader; PcieUpdateConfigurationData (*Pcie); return AGESA_SUCCESS; } |