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Diffstat (limited to 'src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze')
-rw-r--r--src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeEhciMidService.c17
-rw-r--r--src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeXhciEnvService.c42
2 files changed, 49 insertions, 10 deletions
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeEhciMidService.c b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeEhciMidService.c
index 977ee0e27a..8959420c8c 100644
--- a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeEhciMidService.c
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeEhciMidService.c
@@ -66,6 +66,8 @@ FchEhciInitAfterPciInit (
AMD_CONFIG_PARAMS *StdHeader;
UINT32 PortNum;
UINT32 DrivingStrength;
+ UINT8 RetEfuseValue;
+ UINT32 UsbFuseCommonCalibrationValue;
LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr;
StdHeader = LocalCfgPtr->StdHeader;
@@ -122,8 +124,13 @@ FchEhciInitAfterPciInit (
RwMem (BarAddress + FCH_EHCI_BAR_REGD4, AccessWidth32, ~((UINT32) (0x02)), (UINT32) (0x02));
FchStall (400, StdHeader);
RwMem (BarAddress + FCH_EHCI_BAR_REGD4, AccessWidth32, ~((UINT32) (0x02)), (UINT32) (0x0));
- RwMem (BarAddress + FCH_EHCI_BAR_REGC0, AccessWidth32, (UINT32) (~ 0x00010000), BIT16);
-
+ RetEfuseValue = FchUsbCommonPhyCalibration ( FchDataPtr );
+ if ( RetEfuseValue == 0 ) {
+ RwMem (BarAddress + FCH_EHCI_BAR_REGC0, AccessWidth32, (UINT32) (~ 0x00030000), BIT16);
+ } else {
+ UsbFuseCommonCalibrationValue = RetEfuseValue << 11;
+ RwMem (BarAddress + FCH_EHCI_BAR_REGC0, AccessWidth32, (UINT32) (~ 0x0003FF00), UsbFuseCommonCalibrationValue);
+ }
RwPci ((UINT32) Value + 0x50, AccessWidth32, ~ ((UINT32) (0x01 << 6)), (UINT32) (0x01 << 6), StdHeader);
RwPci ((UINT32) Value + 0x50, AccessWidth32, ~ ((UINT32) (0x0F << 8)), (UINT32) (0x01 << 8), StdHeader);
RwPci ((UINT32) Value + 0x50, AccessWidth32, ~ ((UINT32) (0x0F << 12)), (UINT32) (0x01 << 12), StdHeader);
@@ -170,12 +177,6 @@ FchEhciInitAfterPciInit (
RwMem (BarAddress + FCH_EHCI_BAR_REGB4, AccessWidth32, ~((UINT32) (1 << 12)), 0);
RwMem (BarAddress + FCH_EHCI_BAR_REGB4, AccessWidth32, ~((UINT32) (1 << 12)), (UINT32) (0x1 << 12));
}
- } else {
- BarAddress = FCH_FAKE_USB_BAR_ADDRESS;
- WritePci ((UINT32) Value + FCH_EHCI_REG10, AccessWidth32, &BarAddress, StdHeader);
- RwPci ((UINT32) Value + FCH_EHCI_REG04, AccessWidth8, 0, BIT1, StdHeader);
- RwMem (BarAddress + FCH_EHCI_BAR_REGBC, AccessWidth32, (UINT32)~( BIT12 + BIT14), BIT12 + BIT14);
- RwPci ((UINT32) Value + FCH_EHCI_REG04, AccessWidth8, 0, 0, StdHeader);
}
ReadPmio (FCH_PMIOA_REGF0, AccessWidth8, &UsbS3WakeResumeOnlyDisable, StdHeader);
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeXhciEnvService.c b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeXhciEnvService.c
index 67fcaf6408..c34a280532 100644
--- a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeXhciEnvService.c
+++ b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Usb/Family/Yangtze/YangtzeXhciEnvService.c
@@ -47,8 +47,36 @@
// Declaration of local functions
//
+#define PRODUCT_INFO_REG1 0x1FC // Product Information Register 1
+#define AMD_CPU_DEV_FUN ((0x18 << 3) + 3)
+
/**
+ * FchUsbCommonPhyCalibration - Config USB Common PHY
+ * Calibration
+ *
+ *
+ *
+ * @param[in] FchDataPtr Fch configuration structure pointer.
+ *
+ */
+UINT8
+FchUsbCommonPhyCalibration (
+ IN FCH_DATA_BLOCK *FchDataPtr
+ )
+{
+ UINT8 RetEfuseValue;
+ FCH_DATA_BLOCK *LocalCfgPtr;
+ AMD_CONFIG_PARAMS *StdHeader;
+
+ LocalCfgPtr = (FCH_DATA_BLOCK *)FchDataPtr;
+ StdHeader = LocalCfgPtr->StdHeader;
+
+ ReadPci ((AMD_CPU_DEV_FUN << 16) + PRODUCT_INFO_REG1, AccessWidth8, &RetEfuseValue, StdHeader);
+ RetEfuseValue = ((RetEfuseValue & 0x1E) >> 1);
+ return RetEfuseValue;
+}
+/**
* FchXhciUsbPhyCalibrated - Config XHCI Phy
*
*
@@ -133,11 +161,15 @@ FchXhciInitIndirectReg (
UINT32 RegValue;
FCH_DATA_BLOCK *LocalCfgPtr;
AMD_CONFIG_PARAMS *StdHeader;
+ UINT8 RetEfuseValue;
+ UINT32 UsbFuseCommonCalibrationValue;
LocalCfgPtr = (FCH_DATA_BLOCK *)FchDataPtr;
StdHeader = LocalCfgPtr->StdHeader;
DrivingStrength = 0;
+ FchXhciUsbPhyCalibrated (LocalCfgPtr);
+
RwXhci0IndReg ( FCH_XHCI_IND_REG94, 0xFFFFFC00, 0x00000021, StdHeader);
RwXhci0IndReg ( FCH_XHCI_IND_REGD4, 0xFFFFFC00, 0x00000021, StdHeader);
@@ -150,10 +182,16 @@ FchXhciInitIndirectReg (
}
- RwXhci0IndReg ( FCH_XHCI_IND60_REG50, ~ ((UINT32) (0x0f)), ((UINT32) (0x07)), StdHeader);
+ RwXhci0IndReg ( FCH_XHCI_IND60_REG50, ~ ((UINT32) (0x0f)), ((UINT32) (0x06)), StdHeader);
RwXhci0IndReg ( FCH_XHCI_IND60_REG0C, ~ ((UINT32) (0x0f << 4)), ((UINT32) (0x02 << 4)), StdHeader);
RwXhci0IndReg ( FCH_XHCI_IND60_REG0C, ~ ((UINT32) (0x0f << 8)), ((UINT32) (0x02 << 8)), StdHeader);
- RwXhci0IndReg ( FCH_XHCI_IND60_REG08, 0x80FC00FF, 0, StdHeader); // For BTS
+ RetEfuseValue = FchUsbCommonPhyCalibration ( FchDataPtr );
+ if ( RetEfuseValue == 0) {
+ RwXhci0IndReg ( FCH_XHCI_IND60_REG08, 0x80FD00FF, (UINT32) BIT16 , StdHeader);
+ } else {
+ UsbFuseCommonCalibrationValue = RetEfuseValue << 11;
+ RwXhci0IndReg ( FCH_XHCI_IND60_REG08, 0x80FC00FF, UsbFuseCommonCalibrationValue , StdHeader);
+ }
for (Port = 0; Port < 2; Port ++) {
DrivingStrength = 0x1E4;