diff options
Diffstat (limited to 'src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpUkb3.c')
| -rw-r--r-- | src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpUkb3.c | 106 |
1 files changed, 33 insertions, 73 deletions
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpUkb3.c b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpUkb3.c index c18af0a6c7..7e9b64eab1 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpUkb3.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Ps/KB/mpUkb3.c @@ -82,77 +82,18 @@ RDATA_GROUP (G2_PEI) * *----------------------------------------------------------------------------- */ -// Slow mode, POdtOff, Address timing and Output drive compensation -// Format : -// DimmPerCh, DDRrate, VDDIO, Dimm0, Dimm1, Dimm2, SlowMode, AddTmgCtl, ODC, POdtOff -// -STATIC CONST PSCFG_SAO_ENTRY KBUDdr3SAO[] = { - {_1DIMM, DDR667 + DDR800, V1_5, DIMM_SR + DIMM_DR, NP, NP, 0, 0x00000000, 0x00002222, 0}, - {_1DIMM, DDR1066, V1_5, DIMM_SR, NP, NP, 0, 0x003D3D3D, 0x10002222, 0}, - {_1DIMM, DDR1066, V1_5, DIMM_DR, NP, NP, 0, 0x00000000, 0x10002222, 0}, - {_1DIMM, DDR1333, V1_5, DIMM_SR, NP, NP, 0, 0x003D3D3D, 0x20112222, 0}, - {_1DIMM, DDR1333, V1_5, DIMM_DR, NP, NP, 0, 0x00003D3D, 0x20112222, 0}, - {_1DIMM, DDR1600 + DDR1866, V1_5, DIMM_SR, NP, NP, 0, 0x003C3C3C, 0x30332222, 0}, - {_1DIMM, DDR1600 + DDR1866, V1_5, DIMM_DR, NP, NP, 1, 0x00003C3C, 0x30332222, 0}, - {_2DIMM, DDR667 + DDR800, V1_5, NP, DIMM_SR + DIMM_DR, NP, 0, 0x00000000, 0x00002222, 0}, - {_2DIMM, DDR667, V1_5, DIMM_SR + DIMM_DR, DIMM_SR + DIMM_DR, NP, 1, 0x00000000, 0x10222323, 0}, - {_2DIMM, DDR800, V1_5, DIMM_SR + DIMM_DR, DIMM_SR + DIMM_DR, NP, 1, 0x00000000, 0x20222323, 0}, - {_2DIMM, DDR1066, V1_5, NP, DIMM_SR, NP, 0, 0x003D3D3D, 0x10002222, 0}, - {_2DIMM, DDR1066, V1_5, NP, DIMM_DR, NP, 0, 0x00000000, 0x10002222, 0}, - {_2DIMM, DDR1066 + DDR1333 + DDR1600, V1_5, DIMM_SR + DIMM_DR, DIMM_SR + DIMM_DR, NP, 1, 0x00000000, 0x30222323, 0}, - {_2DIMM, DDR1333, V1_5, NP, DIMM_SR, NP, 0, 0x003D3D3D, 0x20112222, 0}, - {_2DIMM, DDR1333, V1_5, NP, DIMM_DR, NP, 0, 0x00003D3D, 0x20112222, 0}, - {_2DIMM, DDR1600 + DDR1866, V1_5, NP, DIMM_SR, NP, 0, 0x003C3C3C, 0x30332222, 0}, - {_2DIMM, DDR1600 + DDR1866, V1_5, NP, DIMM_DR, NP, 1, 0x00003C3C, 0x30332222, 0}, -}; -CONST PSC_TBL_ENTRY KBSAOTblEntU3 = { - {PSCFG_SAO, UDIMM_TYPE, _1DIMM + _2DIMM, {AMD_FAMILY_16_KB, AMD_F16_ALL}, PT_DONT_CARE, DDR3_TECHNOLOGY}, - sizeof (KBUDdr3SAO) / sizeof (PSCFG_SAO_ENTRY), - (VOID *)&KBUDdr3SAO -}; - -// Dram Term and Dynamic Dram Term -// Format : -// DimmPerCh, DDRrate, VDDIO, Dimm0, Dimm1, Dimm2, Dimm, Rank, RttNom, RttWr -// -// RttNom: -// 0 On die termination disabled -// 1 60ohms -// 2 120ohms -// 3 40ohms -// 4 20ohms -// 5 30ohms -// RttWr: -// 0 Dynamic termination for writes disabled. -// 1 60ohms -// 2 120ohms -STATIC CONST PSCFG_RTT_ENTRY DramTermKBUDIMM[] = { - {_1DIMM, DDR667 + DDR800 + DDR1066, V1_5, DIMM_SR + DIMM_DR, NP, NP, DIMM_SR + DIMM_DR, R0 + R1, 2, 0}, - {_1DIMM, DDR1333 + DDR1600 + DDR1866, V1_5, DIMM_SR + DIMM_DR, NP, NP, DIMM_SR + DIMM_DR, R0 + R1, 1, 0}, - {_2DIMM, DDR667 + DDR800 + DDR1066, V1_5, NP, DIMM_SR + DIMM_DR, NP, DIMM_SR + DIMM_DR, R0 + R1, 2, 0}, - {_2DIMM, DDR667 + DDR800, V1_5, DIMM_SR + DIMM_DR, DIMM_SR + DIMM_DR, NP, DIMM_SR + DIMM_DR, R0 + R1, 3, 2}, - {_2DIMM, DDR1066 + DDR1333, V1_5, DIMM_SR + DIMM_DR, DIMM_SR + DIMM_DR, NP, DIMM_SR + DIMM_DR, R0 + R1, 5, 2}, - {_2DIMM, DDR1333 + DDR1600 + DDR1866, V1_5, NP, DIMM_SR + DIMM_DR, NP, DIMM_SR + DIMM_DR, R0 + R1, 1, 0}, - {_2DIMM, DDR1600, V1_5, DIMM_SR + DIMM_DR, DIMM_SR + DIMM_DR, NP, DIMM_SR + DIMM_DR, R0 + R1, 4, 1}, -}; -CONST PSC_TBL_ENTRY KBDramTermTblEntU = { - {PSCFG_RTT, UDIMM_TYPE, _1DIMM + _2DIMM, {AMD_FAMILY_16_KB, AMD_F16_ALL}, PT_DONT_CARE, DDR3_TECHNOLOGY}, - sizeof (DramTermKBUDIMM) / sizeof (PSCFG_RTT_ENTRY), - (VOID *)&DramTermKBUDIMM -}; - // Max Freq. for UDIMM <6-layer Motherboard Design> configuration // Format : // DimmPerCh, Dimms, SR, DR, QR, Speed1_5V, Speed1_35V, Speed1_25V // STATIC CONST PSCFG_MAXFREQ_ENTRY ROMDATA MaxFreqKBUDIMM6L[] = { - {{_1DIMM, 1, 1, 0, 0, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, - {{_1DIMM, 1, 0, 1, 0, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, - {{_2DIMM, 1, 1, 0, 0, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, - {{_2DIMM, 1, 0, 1, 0, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, - {{_2DIMM, 2, 2, 0, 0, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, - {{_2DIMM, 2, 1, 1, 0, DDR1333_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, - {{_2DIMM, 2, 0, 2, 0, DDR1333_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_1DIMM, 1, 1, 0, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_1DIMM, 1, 0, 1, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 1, 1, 0, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 1, 0, 1, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 2, 2, 0, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 2, 1, 1, 0, DDR1333_FREQUENCY, DDR1333_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 2, 0, 2, 0, DDR1333_FREQUENCY, DDR1333_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, }; CONST PSC_TBL_ENTRY KBMaxFreqTblEntU6L = { {PSCFG_MAXFREQ, UDIMM_TYPE, _1DIMM + _2DIMM, {AMD_FAMILY_16_KB, AMD_F16_ALL}, PT_DONT_CARE, DDR3_TECHNOLOGY}, @@ -160,18 +101,37 @@ CONST PSC_TBL_ENTRY KBMaxFreqTblEntU6L = { (VOID *)&MaxFreqKBUDIMM6L }; +// Max Freq. for UDIMM <6-layer Motherboard Design> configuration for microserver +// Format : +// DimmPerCh, Dimms, SR, DR, QR, Speed1_5V, Speed1_35V, Speed1_25V +// +STATIC CONST PSCFG_MAXFREQ_ENTRY ROMDATA MaxFreqKBMicroSrvUDIMM6L[] = { + {{_1DIMM, 1, 1, 0, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_1DIMM, 1, 0, 1, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 1, 1, 0, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 1, 0, 1, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 2, 2, 0, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 2, 1, 1, 0, DDR1333_FREQUENCY, DDR1333_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 2, 0, 2, 0, DDR1333_FREQUENCY, DDR1333_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, +}; +CONST PSC_TBL_ENTRY KBMaxFreqTblEntMicroSrvU6L = { + {PSCFG_MAXFREQ, UDIMM_TYPE, _1DIMM + _2DIMM, {AMD_FAMILY_16_KB, AMD_F16_ALL}, PT_DONT_CARE, DDR3_TECHNOLOGY}, + sizeof (MaxFreqKBMicroSrvUDIMM6L) / sizeof (PSCFG_MAXFREQ_ENTRY), + (VOID *)&MaxFreqKBMicroSrvUDIMM6L +}; + // Max Freq. for UDIMM <4-layer Motherboard Design> configuration // Format : // DimmPerCh, Dimms, SR, DR, QR, Speed1_5V, Speed1_35V, Speed1_25V // STATIC CONST PSCFG_MAXFREQ_ENTRY ROMDATA MaxFreqKBUDIMM4L[] = { - {{_1DIMM, 1, 1, 0, 0, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, - {{_1DIMM, 1, 0, 1, 0, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, - {{_2DIMM, 1, 1, 0, 0, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, - {{_2DIMM, 1, 0, 1, 0, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, - {{_2DIMM, 2, 2, 0, 0, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, - {{_2DIMM, 2, 1, 1, 0, DDR1333_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, - {{_2DIMM, 2, 0, 2, 0, DDR1333_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_1DIMM, 1, 1, 0, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_1DIMM, 1, 0, 1, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 1, 1, 0, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 1, 0, 1, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 2, 2, 0, 0, DDR1600_FREQUENCY, DDR1600_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 2, 1, 1, 0, DDR1333_FREQUENCY, DDR1333_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, + {{_2DIMM, 2, 0, 2, 0, DDR1333_FREQUENCY, DDR1333_FREQUENCY, UNSUPPORTED_DDR_FREQUENCY}}, }; CONST PSC_TBL_ENTRY KBMaxFreqTblEntU4L = { {PSCFG_MAXFREQ, UDIMM_TYPE, _1DIMM + _2DIMM, {AMD_FAMILY_16_KB, AMD_F16_ALL}, PT_DONT_CARE, DDR3_TECHNOLOGY}, |