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-rw-r--r--src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc29
-rw-r--r--src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc29
-rw-r--r--src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc29
3 files changed, 6 insertions, 81 deletions
diff --git a/src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc b/src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc
index 75ba9e7df5..4d903e686f 100644
--- a/src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc
+++ b/src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc
@@ -696,13 +696,6 @@ fam15_enable_stack_hook_exit:
* Return any family specific controls to their 'standard'
* settings for using cache with main memory.
*
-* Note: Customized for coreboot:
-* A wbinvd is used to send cache to memory. The existing stack is preserved
-* at its original location and additional information is preserved (e.g.
-* coreboot CAR globals, heap structures, etc.). This implementation should
-* NOT be used with S3 resume IF the stack/cache area is not reserved and
-* over system memory.
-*
* Inputs:
* ESI - [31:24] flags; [15,8]= Node#; [7,0]= core#
* Outputs:
@@ -911,16 +904,7 @@ fam15_disable_stack_remote_read_exit:
btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion
_WRMSR
- #--------------------------------------------------------------------------
- # Send cache to memory. Preserve stack and coreboot CAR globals.
- # This shouldn't be used with S3 resume IF the stack/cache area is
- # not reserved and over system memory.
- #--------------------------------------------------------------------------
-#if !CONFIG(POSTCAR_STAGE)
- wbinvd
-#else
invd
-#endif
#.if (bh == 01h) || (bh == 03h) ; Is this TN or KV?
cmp $01, %bh
@@ -1563,17 +1547,8 @@ ClearTheStack: # Stack base is in SS, stack pointer is
.endm
/*****************************************************************************
-* AMD_DISABLE_STACK: Implementation is modified for coreboot from
-* the original AMD intent. A WBINVD is used in the HOOK
-* to send dirty cache contents to DRAM backing before
-* disabling cache-as-ram. This is not safe for S3 resume.
-*
-* todo:
-* * rework PI/AGESA source to set DRAM to UC to send
-* writes directly to memory
-* * move DCACHE_BASE or use postcar stage for teardown
-* to eliminate car_migrated problem that will occur
-* after wbinvd is changed back to invd
+* AMD_DISABLE_STACK: Destroy the stack inside the cache. This routine
+* should only be executed on the BSP
*
* In:
* none
diff --git a/src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc b/src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc
index 8f3ca83598..b208cc14ca 100644
--- a/src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc
+++ b/src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc
@@ -401,13 +401,6 @@ fam15_enable_stack_hook_exit:
* Return any family specific controls to their 'standard'
* settings for using cache with main memory.
*
-* Note: Customized for coreboot:
-* A wbinvd is used to send cache to memory. The existing stack is preserved
-* at its original location and additional information is preserved (e.g.
-* coreboot CAR globals, heap structures, etc.). This implementation should
-* NOT be used with S3 resume IF the stack/cache area is not reserved and
-* over system memory.
-*
* Inputs:
* ESI - [31:24] flags; [15,8]= Node#; [7,0]= core#
* Outputs:
@@ -646,16 +639,7 @@ fam15_disable_stack_remote_read_exit:
btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion
_WRMSR
- #--------------------------------------------------------------------------
- # Send cache to memory. Preserve stack and coreboot CAR globals.
- # This shouldn't be used with S3 resume IF the stack/cache area is
- # not reserved and over system memory.
- #--------------------------------------------------------------------------
-#if !CONFIG(POSTCAR_STAGE)
- wbinvd
-#else
invd
-#endif
# #.if (bh == 01h) || (bh == 03h) ; Is this TN or KM?
# cmp $01, %bh
@@ -1302,17 +1286,8 @@ ClearTheStack: # Stack base is in SS, stack pointer is
.endm
/*****************************************************************************
-* AMD_DISABLE_STACK: Implementation is modified for coreboot from
-* the original AMD intent. A WBINVD is used in the HOOK
-* to send dirty cache contents to DRAM backing before
-* disabling cache-as-ram. This is not safe for S3 resume.
-*
-* todo:
-* * rework PI/AGESA source to set DRAM to UC to send
-* writes directly to memory
-* * move DCACHE_BASE or use postcar stage for teardown
-* to eliminate car_migrated problem that will occur
-* after wbinvd is changed back to invd
+* AMD_DISABLE_STACK: Destroy the stack inside the cache. This routine
+* should only be executed on the BSP
*
* In:
* none
diff --git a/src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc b/src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc
index 357b8be6d5..7d86a31c69 100644
--- a/src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc
+++ b/src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc
@@ -383,13 +383,6 @@ fam16_enable_stack_hook_exit:
; Return any family specific controls to their 'standard'
; settings for using cache with main memory.
;
-; Note: Customized for coreboot:
-; A wbinvd is used to send cache to memory. The existing stack is preserved
-; at its original location and additional information is preserved (e.g.
-; coreboot CAR globals, heap structures, etc.). This implementation should
-; NOT be used with S3 resume IF the stack/cache area is not reserved and
-; over system memory.
-;
; Inputs:
; ESI - [31:24] flags; [15:8]= Node#; [7:0]= core#
; Outputs:
@@ -610,16 +603,7 @@ fam16_disable_stack_remote_read_exit:
btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion
_WRMSR
- #--------------------------------------------------------------------------
- # Send cache to memory. Preserve stack and coreboot CAR globals.
- # This shouldn't be used with S3 resume IF the stack/cache area is
- # not reserved and over system memory.
- #--------------------------------------------------------------------------
-#if !CONFIG(POSTCAR_STAGE)
- wbinvd
-#else
invd
-#endif
#Do Standard Family 16 work
mov $HWCR, %ecx # MSR:C001_0015h
@@ -1276,17 +1260,8 @@ ClearTheStack: # Stack base is in SS, stack pointer is
.endm
/*****************************************************************************
-* AMD_DISABLE_STACK: Implementation is modified for coreboot from
-* the original AMD intent. A WBINVD is used in the HOOK
-* to send dirty cache contents to DRAM backing before
-* disabling cache-as-ram. This is not safe for S3 resume.
-*
-* todo:
-* * rework PI/AGESA source to set DRAM to UC to send
-* writes directly to memory
-* * move DCACHE_BASE or use postcar stage for teardown
-* to eliminate car_migrated problem that will occur
-* after wbinvd is changed back to invd
+* AMD_DISABLE_STACK: Destroy the stack inside the cache. This routine
+* should only be executed on the BSP
*
* In:
* none