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-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h15
-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h4
2 files changed, 15 insertions, 4 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h
index 32b6a327b5..0b3fe7d64c 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h
@@ -2487,7 +2487,18 @@ typedef struct {
/** Offset 0x089F - Reserved
**/
- UINT8 Reserved44[129];
+ UINT8 Reserved44[124];
+
+/** Offset 0x091B - GPIO Override
+ Gpio Override Level - FSP will not configure any GPIOs and rely on GPIO setings
+ before moved to FSP. Available configurations 0: Disable;1: Level 1 - skips GpioSetNativePadByFunction;Level
+ 2 - skips GpioSetNativePadByFunction and GpioSetPadMode
+**/
+ UINT8 GpioOverride;
+
+/** Offset 0x091C - Reserved
+**/
+ UINT8 Reserved45[4];
} FSP_M_CONFIG;
/** Fsp M UPD Configuration
@@ -2508,7 +2519,7 @@ typedef struct {
/** Offset 0x0920
**/
- UINT8 UnusedUpdSpace26[6];
+ UINT8 UnusedUpdSpace25[6];
/** Offset 0x0926
**/
diff --git a/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h b/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h
index b0d9ca9f80..315a0a7a8c 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h
@@ -828,8 +828,8 @@ typedef struct {
**/
UINT8 AmtKvmEnabled;
-/** Offset 0x040E - KVM Switch
- Enable/Disable. 0: Disable, 1: enable, KVM enable/disable state by Mebx.
+/** Offset 0x040E - Force MEBX execution
+ Enable/Disable. 0: Disable, 1: enable, Force MEBX execution.
$EN_DIS
**/
UINT8 ForcMebxSyncUp;