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-rw-r--r--src/cpu/amd/agesa/family10/chip.h21
-rw-r--r--src/cpu/amd/agesa/family10/chip_name.c1
-rw-r--r--src/cpu/amd/agesa/family12/chip.h21
-rw-r--r--src/cpu/amd/agesa/family12/chip_name.c1
-rw-r--r--src/cpu/amd/agesa/family14/chip.h21
-rw-r--r--src/cpu/amd/agesa/family14/chip_name.c1
-rw-r--r--src/cpu/amd/agesa/family15/chip.h21
-rw-r--r--src/cpu/amd/agesa/family15/chip_name.c1
-rw-r--r--src/cpu/amd/agesa/family15tn/chip.h21
-rw-r--r--src/cpu/amd/agesa/family15tn/chip_name.c1
-rw-r--r--src/cpu/amd/sc520/chip.h2
-rw-r--r--src/cpu/amd/sc520/sc520.c1
-rw-r--r--src/cpu/amd/socket_754/chip.h2
-rw-r--r--src/cpu/amd/socket_754/socket_754.c1
-rw-r--r--src/cpu/amd/socket_939/chip.h2
-rw-r--r--src/cpu/amd/socket_939/socket_939.c1
-rw-r--r--src/cpu/amd/socket_940/chip.h2
-rw-r--r--src/cpu/amd/socket_940/socket_940.c1
-rw-r--r--src/cpu/amd/socket_AM2/chip.h2
-rw-r--r--src/cpu/amd/socket_AM2/socket_AM2.c1
-rw-r--r--src/cpu/amd/socket_AM2r2/chip.h21
-rw-r--r--src/cpu/amd/socket_AM2r2/socket_AM2r2.c1
-rw-r--r--src/cpu/amd/socket_AM3/chip.h21
-rw-r--r--src/cpu/amd/socket_AM3/socket_AM3.c1
-rw-r--r--src/cpu/amd/socket_ASB2/chip.h21
-rw-r--r--src/cpu/amd/socket_ASB2/socket_ASB2.c1
-rw-r--r--src/cpu/amd/socket_C32/chip.h21
-rw-r--r--src/cpu/amd/socket_C32/socket_C32.c1
-rw-r--r--src/cpu/amd/socket_F/chip.h2
-rw-r--r--src/cpu/amd/socket_F/socket_F.c1
-rw-r--r--src/cpu/amd/socket_F_1207/chip.h21
-rw-r--r--src/cpu/amd/socket_F_1207/socket_F_1207.c1
-rw-r--r--src/cpu/amd/socket_S1G1/chip.h2
-rw-r--r--src/cpu/amd/socket_S1G1/socket_S1G1.c1
-rw-r--r--src/cpu/intel/ep80579/chip.h21
-rw-r--r--src/cpu/intel/ep80579/ep80579.c1
-rw-r--r--src/cpu/intel/slot_1/chip.h22
-rw-r--r--src/cpu/intel/slot_1/slot_1.c1
-rw-r--r--src/cpu/intel/slot_2/chip.h2
-rw-r--r--src/cpu/intel/slot_2/slot_2.c1
-rw-r--r--src/cpu/intel/socket_441/chip.h21
-rw-r--r--src/cpu/intel/socket_441/socket_441.c1
-rw-r--r--src/cpu/intel/socket_BGA956/chip.h2
-rw-r--r--src/cpu/intel/socket_BGA956/socket_BGA956.c1
-rw-r--r--src/cpu/intel/socket_FC_PGA370/chip.h22
-rw-r--r--src/cpu/intel/socket_FC_PGA370/socket_FC_PGA370.c1
-rw-r--r--src/cpu/intel/socket_LGA771/chip.h2
-rw-r--r--src/cpu/intel/socket_LGA771/socket_LGA771.c1
-rw-r--r--src/cpu/intel/socket_PGA370/chip.h2
-rw-r--r--src/cpu/intel/socket_PGA370/socket_PGA370.c1
-rw-r--r--src/cpu/intel/socket_mFCBGA479/chip.h2
-rw-r--r--src/cpu/intel/socket_mFCBGA479/socket_mFCBGA479.c1
-rw-r--r--src/cpu/intel/socket_mFCPGA478/chip.h2
-rw-r--r--src/cpu/intel/socket_mFCPGA478/socket_mFCPGA478.c1
-rw-r--r--src/cpu/intel/socket_mPGA478/chip.h2
-rw-r--r--src/cpu/intel/socket_mPGA478/socket_mPGA478.c1
-rw-r--r--src/cpu/intel/socket_mPGA479M/chip.h2
-rw-r--r--src/cpu/intel/socket_mPGA479M/socket_mPGA479M.c1
-rw-r--r--src/cpu/intel/socket_mPGA603/chip.h2
-rw-r--r--src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c1
-rw-r--r--src/cpu/intel/socket_mPGA604/chip.h2
-rw-r--r--src/cpu/intel/socket_mPGA604/socket_mPGA604.c1
-rw-r--r--src/cpu/intel/socket_rPGA989/chip.h2
-rw-r--r--src/cpu/intel/socket_rPGA989/socket_rPGA989.c1
-rw-r--r--src/drivers/generic/debug/chip.h2
-rw-r--r--src/drivers/generic/debug/debug_dev.c1
-rw-r--r--src/drivers/i2c/adm1026/adm1026.c1
-rw-r--r--src/drivers/i2c/adm1026/chip.h2
-rw-r--r--src/drivers/i2c/adm1027/adm1027.c1
-rw-r--r--src/drivers/i2c/adm1027/chip.h2
-rw-r--r--src/drivers/i2c/adt7463/adt7463.c1
-rw-r--r--src/drivers/i2c/adt7463/chip.h2
-rw-r--r--src/drivers/i2c/i2cmux/chip.h2
-rw-r--r--src/drivers/i2c/i2cmux/i2cmux.c1
-rw-r--r--src/drivers/i2c/i2cmux2/chip.h2
-rw-r--r--src/drivers/i2c/i2cmux2/i2cmux2.c1
-rw-r--r--src/drivers/i2c/lm63/chip.h2
-rw-r--r--src/drivers/i2c/lm63/lm63.c1
-rw-r--r--src/drivers/i2c/w83795/chip.h2
-rw-r--r--src/mainboard/emulation/qemu-x86/chip.h2
-rw-r--r--src/mainboard/emulation/qemu-x86/northbridge.c1
-rw-r--r--src/northbridge/amd/agesa/family10/chip.h23
-rw-r--r--src/northbridge/amd/agesa/family10/northbridge.c2
-rw-r--r--src/northbridge/amd/agesa/family10/root_complex/chip.h23
-rw-r--r--src/northbridge/amd/agesa/family12/chip.h23
-rw-r--r--src/northbridge/amd/agesa/family12/northbridge.c1
-rw-r--r--src/northbridge/amd/agesa/family12/root_complex/chip.h23
-rw-r--r--src/northbridge/amd/agesa/family14/chip.h23
-rw-r--r--src/northbridge/amd/agesa/family14/northbridge.c1
-rw-r--r--src/northbridge/amd/agesa/family14/root_complex/chip.h23
-rw-r--r--src/northbridge/amd/agesa/family15/chip.h23
-rw-r--r--src/northbridge/amd/agesa/family15/northbridge.c2
-rw-r--r--src/northbridge/amd/agesa/family15/root_complex/chip.h23
-rw-r--r--src/northbridge/amd/agesa/family15tn/chip.h23
-rw-r--r--src/northbridge/amd/agesa/family15tn/northbridge.c2
-rw-r--r--src/northbridge/amd/agesa/family15tn/root_complex/chip.h23
-rw-r--r--src/northbridge/amd/amdfam10/chip.h23
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c2
-rw-r--r--src/northbridge/amd/amdfam10/root_complex/chip.h23
-rw-r--r--src/northbridge/amd/amdk8/chip.h4
-rw-r--r--src/northbridge/amd/amdk8/northbridge.c2
-rw-r--r--src/northbridge/amd/amdk8/root_complex/chip.h4
-rw-r--r--src/northbridge/amd/gx1/chip.h4
-rw-r--r--src/northbridge/amd/gx1/northbridge.c1
-rw-r--r--src/northbridge/amd/gx2/chip.h24
-rw-r--r--src/northbridge/amd/gx2/northbridge.c1
-rw-r--r--src/northbridge/amd/gx2/northbridgeinit.c1
-rw-r--r--src/northbridge/amd/lx/chip.h23
-rw-r--r--src/northbridge/amd/lx/northbridge.c1
-rw-r--r--src/northbridge/amd/lx/northbridgeinit.c1
-rw-r--r--src/northbridge/intel/e7501/chip.h4
-rw-r--r--src/northbridge/intel/e7501/northbridge.c1
-rw-r--r--src/northbridge/intel/e7505/chip.h4
-rw-r--r--src/northbridge/intel/e7505/northbridge.c1
-rw-r--r--src/northbridge/intel/i440bx/chip.h24
-rw-r--r--src/northbridge/intel/i440bx/northbridge.c1
-rw-r--r--src/northbridge/intel/i440lx/chip.h24
-rw-r--r--src/northbridge/intel/i440lx/northbridge.c1
-rw-r--r--src/northbridge/intel/i5000/chip.h22
-rw-r--r--src/northbridge/intel/i5000/northbridge.c1
-rw-r--r--src/northbridge/intel/i82810/chip.h23
-rw-r--r--src/northbridge/intel/i82810/northbridge.c1
-rw-r--r--src/northbridge/intel/i82830/chip.h23
-rw-r--r--src/northbridge/intel/i82830/northbridge.c1
-rw-r--r--src/northbridge/intel/i855/chip.h24
-rw-r--r--src/northbridge/intel/i855/northbridge.c1
-rw-r--r--src/northbridge/intel/i945/chip.h22
-rw-r--r--src/northbridge/intel/i945/northbridge.c1
-rw-r--r--src/northbridge/intel/sch/chip.h22
-rw-r--r--src/northbridge/intel/sch/northbridge.c1
-rw-r--r--src/northbridge/rdc/r8610/chip.h23
-rw-r--r--src/northbridge/rdc/r8610/northbridge.c1
-rw-r--r--src/northbridge/via/cn400/agp.c1
-rw-r--r--src/northbridge/via/cn400/chip.h23
-rw-r--r--src/northbridge/via/cn400/northbridge.c1
-rw-r--r--src/northbridge/via/cn400/vga.c1
-rw-r--r--src/northbridge/via/cn400/vlink.c1
-rw-r--r--src/northbridge/via/cn700/agp.c1
-rw-r--r--src/northbridge/via/cn700/chip.h23
-rw-r--r--src/northbridge/via/cn700/northbridge.c1
-rw-r--r--src/northbridge/via/cn700/vga.c1
-rw-r--r--src/northbridge/via/cx700/chip.h22
-rw-r--r--src/northbridge/via/cx700/northbridge.c1
-rw-r--r--src/northbridge/via/cx700/vga.c1
-rw-r--r--src/northbridge/via/vt8601/chip.h4
-rw-r--r--src/northbridge/via/vt8601/northbridge.c1
-rw-r--r--src/northbridge/via/vt8623/chip.h4
-rw-r--r--src/northbridge/via/vt8623/northbridge.c1
-rw-r--r--src/northbridge/via/vt8623/vga.c1
-rw-r--r--src/northbridge/via/vx800/chip.h22
-rw-r--r--src/northbridge/via/vx800/ide.c5
-rw-r--r--src/northbridge/via/vx800/lpc.c1
-rw-r--r--src/northbridge/via/vx800/northbridge.c1
-rw-r--r--src/northbridge/via/vx800/vga.c1
-rw-r--r--src/southbridge/amd/cimx/sb700/chip_name.c25
-rw-r--r--src/southbridge/amd/cimx/sb800/chip_name.c25
-rw-r--r--src/southbridge/amd/cimx/sb900/chip_name.c25
-rw-r--r--src/southbridge/intel/i82801cx/chip.h8
-rw-r--r--src/southbridge/intel/i82801cx/i82801cx.h1
-rw-r--r--src/southbridge/intel/pxhd/chip.h5
-rw-r--r--src/southbridge/intel/pxhd/pxhd.h1
-rw-r--r--src/southbridge/ti/pcixx12/chip.h28
-rw-r--r--src/southbridge/ti/pcixx12/pcixx12.c2
-rw-r--r--src/superio/fintek/f71805f/chip.h33
-rw-r--r--src/superio/fintek/f71805f/superio.c1
-rw-r--r--src/superio/fintek/f71859/chip.h31
-rw-r--r--src/superio/fintek/f71859/superio.c1
-rw-r--r--src/superio/intel/i3100/chip.h30
-rw-r--r--src/superio/intel/i3100/superio.c1
-rw-r--r--src/superio/ite/it8661f/chip.h33
-rw-r--r--src/superio/ite/it8661f/superio.c1
-rw-r--r--src/superio/ite/it8705f/chip.h33
-rw-r--r--src/superio/ite/it8705f/superio.c3
-rw-r--r--src/superio/nsc/pc87382/chip.h30
-rw-r--r--src/superio/nsc/pc87382/superio.c1
-rw-r--r--src/superio/nsc/pc87384/chip.h30
-rw-r--r--src/superio/nsc/pc87384/superio.c1
-rw-r--r--src/superio/nsc/pc87392/chip.h30
-rw-r--r--src/superio/nsc/pc87392/superio.c1
-rw-r--r--src/superio/smsc/lpc47n217/chip.h30
-rw-r--r--src/superio/smsc/lpc47n217/superio.c4
-rw-r--r--src/superio/via/vt1211/chip.h30
-rw-r--r--src/superio/via/vt1211/vt1211.c1
183 files changed, 0 insertions, 1531 deletions
diff --git a/src/cpu/amd/agesa/family10/chip.h b/src/cpu/amd/agesa/family10/chip.h
deleted file mode 100644
index 4f9fa770bf..0000000000
--- a/src/cpu/amd/agesa/family10/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct cpu_amd_agesa_family10_config {
-};
diff --git a/src/cpu/amd/agesa/family10/chip_name.c b/src/cpu/amd/agesa/family10/chip_name.c
index d99769c92a..656b4a2b20 100644
--- a/src/cpu/amd/agesa/family10/chip_name.c
+++ b/src/cpu/amd/agesa/family10/chip_name.c
@@ -18,7 +18,6 @@
*/
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_amd_agesa_family10_ops = {
CHIP_NAME("AMD CPU Family 10h")
diff --git a/src/cpu/amd/agesa/family12/chip.h b/src/cpu/amd/agesa/family12/chip.h
deleted file mode 100644
index 0eaa0e2789..0000000000
--- a/src/cpu/amd/agesa/family12/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct cpu_amd_agesa_family12_config {
-};
diff --git a/src/cpu/amd/agesa/family12/chip_name.c b/src/cpu/amd/agesa/family12/chip_name.c
index 5de72c73ea..6574615950 100644
--- a/src/cpu/amd/agesa/family12/chip_name.c
+++ b/src/cpu/amd/agesa/family12/chip_name.c
@@ -18,7 +18,6 @@
*/
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_amd_agesa_family12_ops = {
CHIP_NAME("AMD CPU Family 12h")
diff --git a/src/cpu/amd/agesa/family14/chip.h b/src/cpu/amd/agesa/family14/chip.h
deleted file mode 100644
index 59c7cfeb67..0000000000
--- a/src/cpu/amd/agesa/family14/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct cpu_amd_agesa_family14_config {
-};
diff --git a/src/cpu/amd/agesa/family14/chip_name.c b/src/cpu/amd/agesa/family14/chip_name.c
index 2c296f59d3..474edc726c 100644
--- a/src/cpu/amd/agesa/family14/chip_name.c
+++ b/src/cpu/amd/agesa/family14/chip_name.c
@@ -18,7 +18,6 @@
*/
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_amd_agesa_family14_ops = {
CHIP_NAME("AMD CPU Family 14h")
diff --git a/src/cpu/amd/agesa/family15/chip.h b/src/cpu/amd/agesa/family15/chip.h
deleted file mode 100644
index e6daaefd58..0000000000
--- a/src/cpu/amd/agesa/family15/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct cpu_amd_agesa_family15_config {
-};
diff --git a/src/cpu/amd/agesa/family15/chip_name.c b/src/cpu/amd/agesa/family15/chip_name.c
index 963a423df1..3ca6e9fe60 100644
--- a/src/cpu/amd/agesa/family15/chip_name.c
+++ b/src/cpu/amd/agesa/family15/chip_name.c
@@ -18,7 +18,6 @@
*/
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_amd_agesa_family15_ops = {
CHIP_NAME("AMD CPU Family 15h")
diff --git a/src/cpu/amd/agesa/family15tn/chip.h b/src/cpu/amd/agesa/family15tn/chip.h
deleted file mode 100644
index 5ad93c5e0c..0000000000
--- a/src/cpu/amd/agesa/family15tn/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct cpu_amd_agesa_family15tn_config {
-};
diff --git a/src/cpu/amd/agesa/family15tn/chip_name.c b/src/cpu/amd/agesa/family15tn/chip_name.c
index a2a5519aba..d9232609f6 100644
--- a/src/cpu/amd/agesa/family15tn/chip_name.c
+++ b/src/cpu/amd/agesa/family15tn/chip_name.c
@@ -18,7 +18,6 @@
*/
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_amd_agesa_family15tn_ops = {
CHIP_NAME("AMD CPU Family 15h")
diff --git a/src/cpu/amd/sc520/chip.h b/src/cpu/amd/sc520/chip.h
deleted file mode 100644
index 64f3a85afc..0000000000
--- a/src/cpu/amd/sc520/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_amd_sc520_config {
-};
diff --git a/src/cpu/amd/sc520/sc520.c b/src/cpu/amd/sc520/sc520.c
index 059e4fd2eb..382eb877ba 100644
--- a/src/cpu/amd/sc520/sc520.c
+++ b/src/cpu/amd/sc520/sc520.c
@@ -14,7 +14,6 @@
#include <string.h>
#include <bitops.h>
#include <delay.h>
-#include "chip.h"
/*
* set up basic things ...
diff --git a/src/cpu/amd/socket_754/chip.h b/src/cpu/amd/socket_754/chip.h
deleted file mode 100644
index 197145faf6..0000000000
--- a/src/cpu/amd/socket_754/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_amd_socket_754_config {
-};
diff --git a/src/cpu/amd/socket_754/socket_754.c b/src/cpu/amd/socket_754/socket_754.c
index 8fdcf57465..f75c1ec59a 100644
--- a/src/cpu/amd/socket_754/socket_754.c
+++ b/src/cpu/amd/socket_754/socket_754.c
@@ -1,5 +1,4 @@
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_amd_socket_754_ops = {
diff --git a/src/cpu/amd/socket_939/chip.h b/src/cpu/amd/socket_939/chip.h
deleted file mode 100644
index ca934512b2..0000000000
--- a/src/cpu/amd/socket_939/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_amd_socket_939_config {
-};
diff --git a/src/cpu/amd/socket_939/socket_939.c b/src/cpu/amd/socket_939/socket_939.c
index 656375244e..a44a8a6452 100644
--- a/src/cpu/amd/socket_939/socket_939.c
+++ b/src/cpu/amd/socket_939/socket_939.c
@@ -1,5 +1,4 @@
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_amd_socket_939_ops = {
CHIP_NAME("Socket 939 CPU")
diff --git a/src/cpu/amd/socket_940/chip.h b/src/cpu/amd/socket_940/chip.h
deleted file mode 100644
index 8b966141b5..0000000000
--- a/src/cpu/amd/socket_940/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_amd_socket_940_config {
-};
diff --git a/src/cpu/amd/socket_940/socket_940.c b/src/cpu/amd/socket_940/socket_940.c
index 54531ef4f3..872f0406e2 100644
--- a/src/cpu/amd/socket_940/socket_940.c
+++ b/src/cpu/amd/socket_940/socket_940.c
@@ -1,5 +1,4 @@
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_amd_socket_940_ops = {
CHIP_NAME("Socket 940 CPU")
diff --git a/src/cpu/amd/socket_AM2/chip.h b/src/cpu/amd/socket_AM2/chip.h
deleted file mode 100644
index 5d9e875320..0000000000
--- a/src/cpu/amd/socket_AM2/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_amd_socket_AM2_config {
-};
diff --git a/src/cpu/amd/socket_AM2/socket_AM2.c b/src/cpu/amd/socket_AM2/socket_AM2.c
index 474e19dc86..60378abad7 100644
--- a/src/cpu/amd/socket_AM2/socket_AM2.c
+++ b/src/cpu/amd/socket_AM2/socket_AM2.c
@@ -1,5 +1,4 @@
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_amd_socket_AM2_ops = {
CHIP_NAME("Socket AM2 CPU")
diff --git a/src/cpu/amd/socket_AM2r2/chip.h b/src/cpu/amd/socket_AM2r2/chip.h
deleted file mode 100644
index 1c93a99bd5..0000000000
--- a/src/cpu/amd/socket_AM2r2/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct cpu_amd_socket_AM2r2_config {
-};
diff --git a/src/cpu/amd/socket_AM2r2/socket_AM2r2.c b/src/cpu/amd/socket_AM2r2/socket_AM2r2.c
index 3f98e535ca..d6185631d9 100644
--- a/src/cpu/amd/socket_AM2r2/socket_AM2r2.c
+++ b/src/cpu/amd/socket_AM2r2/socket_AM2r2.c
@@ -18,7 +18,6 @@
*/
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_amd_socket_AM2r2_ops = {
CHIP_NAME("socket AM2r2")
diff --git a/src/cpu/amd/socket_AM3/chip.h b/src/cpu/amd/socket_AM3/chip.h
deleted file mode 100644
index 70f6b1fcbb..0000000000
--- a/src/cpu/amd/socket_AM3/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct cpu_amd_socket_AM3_config {
-};
diff --git a/src/cpu/amd/socket_AM3/socket_AM3.c b/src/cpu/amd/socket_AM3/socket_AM3.c
index 75b3970cfe..91871e865a 100644
--- a/src/cpu/amd/socket_AM3/socket_AM3.c
+++ b/src/cpu/amd/socket_AM3/socket_AM3.c
@@ -18,7 +18,6 @@
*/
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_amd_socket_AM3_ops = {
CHIP_NAME("socket AM3")
diff --git a/src/cpu/amd/socket_ASB2/chip.h b/src/cpu/amd/socket_ASB2/chip.h
deleted file mode 100644
index 5939c2b71d..0000000000
--- a/src/cpu/amd/socket_ASB2/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct cpu_amd_socket_ASB2_config {
-};
diff --git a/src/cpu/amd/socket_ASB2/socket_ASB2.c b/src/cpu/amd/socket_ASB2/socket_ASB2.c
index fd3b522aa5..3c38a8cc38 100644
--- a/src/cpu/amd/socket_ASB2/socket_ASB2.c
+++ b/src/cpu/amd/socket_ASB2/socket_ASB2.c
@@ -18,7 +18,6 @@
*/
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_amd_socket_ASB2_ops = {
CHIP_NAME("socket ASB2")
diff --git a/src/cpu/amd/socket_C32/chip.h b/src/cpu/amd/socket_C32/chip.h
deleted file mode 100644
index e9d57c7a7a..0000000000
--- a/src/cpu/amd/socket_C32/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct cpu_amd_socket_C32_config {
-};
diff --git a/src/cpu/amd/socket_C32/socket_C32.c b/src/cpu/amd/socket_C32/socket_C32.c
index 266bfa0186..4f904587fc 100644
--- a/src/cpu/amd/socket_C32/socket_C32.c
+++ b/src/cpu/amd/socket_C32/socket_C32.c
@@ -18,7 +18,6 @@
*/
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_amd_socket_C32_ops = {
CHIP_NAME("socket C32")
diff --git a/src/cpu/amd/socket_F/chip.h b/src/cpu/amd/socket_F/chip.h
deleted file mode 100644
index cb582d3f61..0000000000
--- a/src/cpu/amd/socket_F/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_amd_socket_F_config {
-};
diff --git a/src/cpu/amd/socket_F/socket_F.c b/src/cpu/amd/socket_F/socket_F.c
index 93db628f93..80c3e35a47 100644
--- a/src/cpu/amd/socket_F/socket_F.c
+++ b/src/cpu/amd/socket_F/socket_F.c
@@ -1,5 +1,4 @@
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_amd_socket_F_ops = {
CHIP_NAME("Socket F CPU")
diff --git a/src/cpu/amd/socket_F_1207/chip.h b/src/cpu/amd/socket_F_1207/chip.h
deleted file mode 100644
index 3f7d8242e3..0000000000
--- a/src/cpu/amd/socket_F_1207/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct cpu_amd_socket_F_1207_config {
-};
diff --git a/src/cpu/amd/socket_F_1207/socket_F_1207.c b/src/cpu/amd/socket_F_1207/socket_F_1207.c
index a95e8ea3b2..e84f435a81 100644
--- a/src/cpu/amd/socket_F_1207/socket_F_1207.c
+++ b/src/cpu/amd/socket_F_1207/socket_F_1207.c
@@ -18,7 +18,6 @@
*/
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_amd_socket_F_1207_ops = {
CHIP_NAME("socket F_1207")
diff --git a/src/cpu/amd/socket_S1G1/chip.h b/src/cpu/amd/socket_S1G1/chip.h
deleted file mode 100644
index 3109da265e..0000000000
--- a/src/cpu/amd/socket_S1G1/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_amd_socket_S1G1_config {
-};
diff --git a/src/cpu/amd/socket_S1G1/socket_S1G1.c b/src/cpu/amd/socket_S1G1/socket_S1G1.c
index 352ecc3633..0b9702c8da 100644
--- a/src/cpu/amd/socket_S1G1/socket_S1G1.c
+++ b/src/cpu/amd/socket_S1G1/socket_S1G1.c
@@ -1,5 +1,4 @@
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_amd_socket_S1G1_ops = {
CHIP_NAME("Socket S1G1 CPU")
diff --git a/src/cpu/intel/ep80579/chip.h b/src/cpu/intel/ep80579/chip.h
deleted file mode 100644
index 08e752916d..0000000000
--- a/src/cpu/intel/ep80579/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Arastra, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct cpu_intel_ep80579_config {
-};
diff --git a/src/cpu/intel/ep80579/ep80579.c b/src/cpu/intel/ep80579/ep80579.c
index fd964a43df..7d6e71561f 100644
--- a/src/cpu/intel/ep80579/ep80579.c
+++ b/src/cpu/intel/ep80579/ep80579.c
@@ -18,7 +18,6 @@
*/
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_intel_ep80579_ops = {
CHIP_NAME("EP80579 CPU")
diff --git a/src/cpu/intel/slot_1/chip.h b/src/cpu/intel/slot_1/chip.h
deleted file mode 100644
index 8650f90a7c..0000000000
--- a/src/cpu/intel/slot_1/chip.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Keith Hui <buurin@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct cpu_intel_slot_1_config {
-};
diff --git a/src/cpu/intel/slot_1/slot_1.c b/src/cpu/intel/slot_1/slot_1.c
index 548127fbcc..df4824834e 100644
--- a/src/cpu/intel/slot_1/slot_1.c
+++ b/src/cpu/intel/slot_1/slot_1.c
@@ -19,7 +19,6 @@
*/
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_intel_slot_1_ops = {
CHIP_NAME("Slot 1 CPU")
diff --git a/src/cpu/intel/slot_2/chip.h b/src/cpu/intel/slot_2/chip.h
deleted file mode 100644
index d7bb2b1764..0000000000
--- a/src/cpu/intel/slot_2/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_slot_2_config {
-};
diff --git a/src/cpu/intel/slot_2/slot_2.c b/src/cpu/intel/slot_2/slot_2.c
index ddc2f3bed5..994b25aee0 100644
--- a/src/cpu/intel/slot_2/slot_2.c
+++ b/src/cpu/intel/slot_2/slot_2.c
@@ -1,5 +1,4 @@
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_intel_slot_2_ops = {
diff --git a/src/cpu/intel/socket_441/chip.h b/src/cpu/intel/socket_441/chip.h
deleted file mode 100644
index 70c4ac8c64..0000000000
--- a/src/cpu/intel/socket_441/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct cpu_intel_socket_441_config {
-};
diff --git a/src/cpu/intel/socket_441/socket_441.c b/src/cpu/intel/socket_441/socket_441.c
index eb57dce4c2..319a402799 100644
--- a/src/cpu/intel/socket_441/socket_441.c
+++ b/src/cpu/intel/socket_441/socket_441.c
@@ -18,7 +18,6 @@
*/
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_intel_socket_441_ops = {
CHIP_NAME("Socket 441 CPU")
diff --git a/src/cpu/intel/socket_BGA956/chip.h b/src/cpu/intel/socket_BGA956/chip.h
deleted file mode 100644
index 399200dc51..0000000000
--- a/src/cpu/intel/socket_BGA956/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_BGA956_config {
-};
diff --git a/src/cpu/intel/socket_BGA956/socket_BGA956.c b/src/cpu/intel/socket_BGA956/socket_BGA956.c
index 53667c1bce..def7cc9f91 100644
--- a/src/cpu/intel/socket_BGA956/socket_BGA956.c
+++ b/src/cpu/intel/socket_BGA956/socket_BGA956.c
@@ -1,5 +1,4 @@
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_intel_socket_BGA956_ops = {
CHIP_NAME("Socket BGA956 CPU")
diff --git a/src/cpu/intel/socket_FC_PGA370/chip.h b/src/cpu/intel/socket_FC_PGA370/chip.h
deleted file mode 100644
index 7148d4761f..0000000000
--- a/src/cpu/intel/socket_FC_PGA370/chip.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Joseph Smith <joe@settoplinux.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct cpu_intel_socket_FC_PGA370_config {
-};
diff --git a/src/cpu/intel/socket_FC_PGA370/socket_FC_PGA370.c b/src/cpu/intel/socket_FC_PGA370/socket_FC_PGA370.c
index e3bca8f262..62186f2bf6 100644
--- a/src/cpu/intel/socket_FC_PGA370/socket_FC_PGA370.c
+++ b/src/cpu/intel/socket_FC_PGA370/socket_FC_PGA370.c
@@ -19,7 +19,6 @@
*/
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_intel_socket_FC_PGA370_ops = {
CHIP_NAME("(FC)PGA370 CPU")
diff --git a/src/cpu/intel/socket_LGA771/chip.h b/src/cpu/intel/socket_LGA771/chip.h
deleted file mode 100644
index fc51d777cf..0000000000
--- a/src/cpu/intel/socket_LGA771/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_LGA771_config {
-};
diff --git a/src/cpu/intel/socket_LGA771/socket_LGA771.c b/src/cpu/intel/socket_LGA771/socket_LGA771.c
index 21a7dc9150..85570ba593 100644
--- a/src/cpu/intel/socket_LGA771/socket_LGA771.c
+++ b/src/cpu/intel/socket_LGA771/socket_LGA771.c
@@ -1,5 +1,4 @@
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_intel_socket_LGA771_ops = {
diff --git a/src/cpu/intel/socket_PGA370/chip.h b/src/cpu/intel/socket_PGA370/chip.h
deleted file mode 100644
index c2c70ec4ad..0000000000
--- a/src/cpu/intel/socket_PGA370/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_PGA370_config {
-};
diff --git a/src/cpu/intel/socket_PGA370/socket_PGA370.c b/src/cpu/intel/socket_PGA370/socket_PGA370.c
index fffd983a41..f7c1c2ae62 100644
--- a/src/cpu/intel/socket_PGA370/socket_PGA370.c
+++ b/src/cpu/intel/socket_PGA370/socket_PGA370.c
@@ -1,5 +1,4 @@
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_intel_socket_PGA370_ops = {
CHIP_NAME("Socket PGA370 CPU")
diff --git a/src/cpu/intel/socket_mFCBGA479/chip.h b/src/cpu/intel/socket_mFCBGA479/chip.h
deleted file mode 100644
index 57e432c615..0000000000
--- a/src/cpu/intel/socket_mFCBGA479/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_mFCBGA479_config {
-};
diff --git a/src/cpu/intel/socket_mFCBGA479/socket_mFCBGA479.c b/src/cpu/intel/socket_mFCBGA479/socket_mFCBGA479.c
index 4c0bc72976..02849b95ee 100644
--- a/src/cpu/intel/socket_mFCBGA479/socket_mFCBGA479.c
+++ b/src/cpu/intel/socket_mFCBGA479/socket_mFCBGA479.c
@@ -1,5 +1,4 @@
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_intel_socket_mFCBGA479_ops = {
CHIP_NAME("Micro-FCBGA 479 CPU")
diff --git a/src/cpu/intel/socket_mFCPGA478/chip.h b/src/cpu/intel/socket_mFCPGA478/chip.h
deleted file mode 100644
index 50268f5705..0000000000
--- a/src/cpu/intel/socket_mFCPGA478/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_mFCPGA478_config {
-};
diff --git a/src/cpu/intel/socket_mFCPGA478/socket_mFCPGA478.c b/src/cpu/intel/socket_mFCPGA478/socket_mFCPGA478.c
index 117a929b9c..5b001bd259 100644
--- a/src/cpu/intel/socket_mFCPGA478/socket_mFCPGA478.c
+++ b/src/cpu/intel/socket_mFCPGA478/socket_mFCPGA478.c
@@ -1,5 +1,4 @@
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_intel_socket_mFCPGA478_ops = {
diff --git a/src/cpu/intel/socket_mPGA478/chip.h b/src/cpu/intel/socket_mPGA478/chip.h
deleted file mode 100644
index 3dafc9ae3e..0000000000
--- a/src/cpu/intel/socket_mPGA478/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_mPGA478_config {
-};
diff --git a/src/cpu/intel/socket_mPGA478/socket_mPGA478.c b/src/cpu/intel/socket_mPGA478/socket_mPGA478.c
index da32966215..4480bde9a8 100644
--- a/src/cpu/intel/socket_mPGA478/socket_mPGA478.c
+++ b/src/cpu/intel/socket_mPGA478/socket_mPGA478.c
@@ -1,5 +1,4 @@
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_intel_socket_mPGA478_ops = {
diff --git a/src/cpu/intel/socket_mPGA479M/chip.h b/src/cpu/intel/socket_mPGA479M/chip.h
deleted file mode 100644
index c0c5cd4d6d..0000000000
--- a/src/cpu/intel/socket_mPGA479M/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_mPGA479M_config {
-};
diff --git a/src/cpu/intel/socket_mPGA479M/socket_mPGA479M.c b/src/cpu/intel/socket_mPGA479M/socket_mPGA479M.c
index de824b54fd..b151c47d68 100644
--- a/src/cpu/intel/socket_mPGA479M/socket_mPGA479M.c
+++ b/src/cpu/intel/socket_mPGA479M/socket_mPGA479M.c
@@ -1,5 +1,4 @@
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_intel_socket_mPGA479M_ops = {
diff --git a/src/cpu/intel/socket_mPGA603/chip.h b/src/cpu/intel/socket_mPGA603/chip.h
deleted file mode 100644
index b39982ab1f..0000000000
--- a/src/cpu/intel/socket_mPGA603/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_mPGA603_config {
-};
diff --git a/src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c b/src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c
index 9154608df4..f5a1535637 100644
--- a/src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c
+++ b/src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c
@@ -1,5 +1,4 @@
#include <device/device.h>
-#include "chip.h"
struct chip_opertations cpu_intel_socket_mPGA603_ops = {
diff --git a/src/cpu/intel/socket_mPGA604/chip.h b/src/cpu/intel/socket_mPGA604/chip.h
deleted file mode 100644
index 3a09b82b8b..0000000000
--- a/src/cpu/intel/socket_mPGA604/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_mPGA604_config {
-};
diff --git a/src/cpu/intel/socket_mPGA604/socket_mPGA604.c b/src/cpu/intel/socket_mPGA604/socket_mPGA604.c
index df372b2771..74bdc0dd9b 100644
--- a/src/cpu/intel/socket_mPGA604/socket_mPGA604.c
+++ b/src/cpu/intel/socket_mPGA604/socket_mPGA604.c
@@ -1,5 +1,4 @@
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_intel_socket_mPGA604_ops = {
diff --git a/src/cpu/intel/socket_rPGA989/chip.h b/src/cpu/intel/socket_rPGA989/chip.h
deleted file mode 100644
index ee3b396a1e..0000000000
--- a/src/cpu/intel/socket_rPGA989/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_rPGA989_config {
-};
diff --git a/src/cpu/intel/socket_rPGA989/socket_rPGA989.c b/src/cpu/intel/socket_rPGA989/socket_rPGA989.c
index 2484571559..6e05b57653 100644
--- a/src/cpu/intel/socket_rPGA989/socket_rPGA989.c
+++ b/src/cpu/intel/socket_rPGA989/socket_rPGA989.c
@@ -1,5 +1,4 @@
#include <device/device.h>
-#include "chip.h"
struct chip_operations cpu_intel_socket_rPGA989_ops = {
CHIP_NAME("Socket rPGA989 CPU")
diff --git a/src/drivers/generic/debug/chip.h b/src/drivers/generic/debug/chip.h
deleted file mode 100644
index 661fd54d7c..0000000000
--- a/src/drivers/generic/debug/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct drivers_generic_debug_config {
-};
diff --git a/src/drivers/generic/debug/debug_dev.c b/src/drivers/generic/debug/debug_dev.c
index 60d610fe40..57f807748e 100644
--- a/src/drivers/generic/debug/debug_dev.c
+++ b/src/drivers/generic/debug/debug_dev.c
@@ -7,7 +7,6 @@
#include <cpu/x86/msr.h>
#include <reset.h>
#include <delay.h>
-#include "chip.h"
static void print_pci_regs(struct device *dev)
{
diff --git a/src/drivers/i2c/adm1026/adm1026.c b/src/drivers/i2c/adm1026/adm1026.c
index 5b06629088..ab85eb56a6 100644
--- a/src/drivers/i2c/adm1026/adm1026.c
+++ b/src/drivers/i2c/adm1026/adm1026.c
@@ -5,7 +5,6 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <cpu/x86/msr.h>
-#include "chip.h"
#define ADM1026_DEVICE 0x2d /* Either 0x2c or 0x2d or 0x2e */
#define ADM1026_REG_CONFIG1 0x00
diff --git a/src/drivers/i2c/adm1026/chip.h b/src/drivers/i2c/adm1026/chip.h
deleted file mode 100644
index f8324ad797..0000000000
--- a/src/drivers/i2c/adm1026/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct drivers_i2c_adm1026_config {
-};
diff --git a/src/drivers/i2c/adm1027/adm1027.c b/src/drivers/i2c/adm1027/adm1027.c
index e97ec69569..e83f2c44d0 100644
--- a/src/drivers/i2c/adm1027/adm1027.c
+++ b/src/drivers/i2c/adm1027/adm1027.c
@@ -5,7 +5,6 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <cpu/x86/msr.h>
-#include "chip.h"
#define ADM1027_REG_CONFIG1 0x40
#define CFG1_STRT 0x01
diff --git a/src/drivers/i2c/adm1027/chip.h b/src/drivers/i2c/adm1027/chip.h
deleted file mode 100644
index 8836817c36..0000000000
--- a/src/drivers/i2c/adm1027/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct drivers_i2c_adm1027_config {
-};
diff --git a/src/drivers/i2c/adt7463/adt7463.c b/src/drivers/i2c/adt7463/adt7463.c
index 3967bf712e..a791fb44c5 100644
--- a/src/drivers/i2c/adt7463/adt7463.c
+++ b/src/drivers/i2c/adt7463/adt7463.c
@@ -23,7 +23,6 @@
#include <device/device.h>
#include <console/console.h>
#include <device/smbus.h>
-#include "chip.h"
/**
* Do some S2881-specific HWM initialization for the ADT7463 chip.
diff --git a/src/drivers/i2c/adt7463/chip.h b/src/drivers/i2c/adt7463/chip.h
deleted file mode 100644
index 351d548029..0000000000
--- a/src/drivers/i2c/adt7463/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct drivers_i2c_adt7463_config {
-};
diff --git a/src/drivers/i2c/i2cmux/chip.h b/src/drivers/i2c/i2cmux/chip.h
deleted file mode 100644
index 0cfd837755..0000000000
--- a/src/drivers/i2c/i2cmux/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct drivers_i2c_i2cmux_config {
-};
diff --git a/src/drivers/i2c/i2cmux/i2cmux.c b/src/drivers/i2c/i2cmux/i2cmux.c
index 44bf390028..b318508ae2 100644
--- a/src/drivers/i2c/i2cmux/i2cmux.c
+++ b/src/drivers/i2c/i2cmux/i2cmux.c
@@ -5,7 +5,6 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <cpu/x86/msr.h>
-#include "chip.h"
static void i2cmux_set_link(device_t dev, unsigned int link)
{
diff --git a/src/drivers/i2c/i2cmux2/chip.h b/src/drivers/i2c/i2cmux2/chip.h
deleted file mode 100644
index dafa1d71ad..0000000000
--- a/src/drivers/i2c/i2cmux2/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct drivers_i2c_i2cmux2_config {
-};
diff --git a/src/drivers/i2c/i2cmux2/i2cmux2.c b/src/drivers/i2c/i2cmux2/i2cmux2.c
index dc8ec25d89..a7d40e2176 100644
--- a/src/drivers/i2c/i2cmux2/i2cmux2.c
+++ b/src/drivers/i2c/i2cmux2/i2cmux2.c
@@ -5,7 +5,6 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <cpu/x86/msr.h>
-#include "chip.h"
static void i2cmux2_set_link(device_t dev, unsigned int link)
{
diff --git a/src/drivers/i2c/lm63/chip.h b/src/drivers/i2c/lm63/chip.h
deleted file mode 100644
index 1c5bc7a33a..0000000000
--- a/src/drivers/i2c/lm63/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct drivers_i2c_lm63_config {
-};
diff --git a/src/drivers/i2c/lm63/lm63.c b/src/drivers/i2c/lm63/lm63.c
index d98a245de5..47a548946f 100644
--- a/src/drivers/i2c/lm63/lm63.c
+++ b/src/drivers/i2c/lm63/lm63.c
@@ -5,7 +5,6 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <cpu/x86/msr.h>
-#include "chip.h"
static void lm63_init(device_t dev)
{
diff --git a/src/drivers/i2c/w83795/chip.h b/src/drivers/i2c/w83795/chip.h
deleted file mode 100644
index b5162c1344..0000000000
--- a/src/drivers/i2c/w83795/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct drivers_i2c_w83795_config {
-};
diff --git a/src/mainboard/emulation/qemu-x86/chip.h b/src/mainboard/emulation/qemu-x86/chip.h
deleted file mode 100644
index 0aa8173a8b..0000000000
--- a/src/mainboard/emulation/qemu-x86/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct mainboard_emulation_qemu_x86_config {};
-
diff --git a/src/mainboard/emulation/qemu-x86/northbridge.c b/src/mainboard/emulation/qemu-x86/northbridge.c
index f1669bbd15..6103229f60 100644
--- a/src/mainboard/emulation/qemu-x86/northbridge.c
+++ b/src/mainboard/emulation/qemu-x86/northbridge.c
@@ -8,7 +8,6 @@
#include <stdlib.h>
#include <string.h>
#include <bitops.h>
-#include "chip.h"
#include <delay.h>
#include <smbios.h>
diff --git a/src/northbridge/amd/agesa/family10/chip.h b/src/northbridge/amd/agesa/family10/chip.h
deleted file mode 100644
index f95d5b1170..0000000000
--- a/src/northbridge/amd/agesa/family10/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family10_config
-{
-};
-
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c
index 2bea5d1c78..f1ed610e42 100644
--- a/src/northbridge/amd/agesa/family10/northbridge.c
+++ b/src/northbridge/amd/agesa/family10/northbridge.c
@@ -39,10 +39,8 @@
#include <Porting.h>
#include <AGESA.h>
#include <Options.h>
-#include "root_complex/chip.h"
#include "northbridge.h"
#include "amdfam10.h"
-#include "chip.h"
extern uint32_t agesawrapper_amdinitmid(void);
diff --git a/src/northbridge/amd/agesa/family10/root_complex/chip.h b/src/northbridge/amd/agesa/family10/root_complex/chip.h
deleted file mode 100644
index 80adb8eb71..0000000000
--- a/src/northbridge/amd/agesa/family10/root_complex/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family10_root_complex_config
-{
-};
-
diff --git a/src/northbridge/amd/agesa/family12/chip.h b/src/northbridge/amd/agesa/family12/chip.h
deleted file mode 100644
index 39efd523d6..0000000000
--- a/src/northbridge/amd/agesa/family12/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family12_config
-{
-};
-
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index 7f1478714b..ac3f3082e7 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -33,7 +33,6 @@
#include <cpu/x86/lapic.h>
#include <cpu/amd/mtrr.h>
-#include "chip.h"
#include "northbridge.h"
#include "SbEarly.h"
#include "agesawrapper.h"
diff --git a/src/northbridge/amd/agesa/family12/root_complex/chip.h b/src/northbridge/amd/agesa/family12/root_complex/chip.h
deleted file mode 100644
index 556f343ad5..0000000000
--- a/src/northbridge/amd/agesa/family12/root_complex/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family12_root_complex_config
-{
-};
-
diff --git a/src/northbridge/amd/agesa/family14/chip.h b/src/northbridge/amd/agesa/family14/chip.h
deleted file mode 100644
index 46ea78a64a..0000000000
--- a/src/northbridge/amd/agesa/family14/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family14_config
-{
-};
-
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index 7ff9adfbba..74473c065e 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -34,7 +34,6 @@
#include <cpu/amd/mtrr.h>
#include "agesawrapper.h"
-#include "chip.h"
#include "northbridge.h"
#if CONFIG_AMD_SB_CIMX
#include <sb_cimx.h>
diff --git a/src/northbridge/amd/agesa/family14/root_complex/chip.h b/src/northbridge/amd/agesa/family14/root_complex/chip.h
deleted file mode 100644
index cf95179073..0000000000
--- a/src/northbridge/amd/agesa/family14/root_complex/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family14_root_complex_config
-{
-};
-
diff --git a/src/northbridge/amd/agesa/family15/chip.h b/src/northbridge/amd/agesa/family15/chip.h
deleted file mode 100644
index b06318b980..0000000000
--- a/src/northbridge/amd/agesa/family15/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family15_config
-{
-};
-
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index c4fc6a891d..f297fc0a8c 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -40,9 +40,7 @@
#include <cpu/amd/amdfam15.h>
#include <cpuRegisters.h>
#include "agesawrapper.h"
-#include "root_complex/chip.h"
#include "northbridge.h"
-#include "chip.h"
#define MAX_NODE_NUMS (MAX_NODES * MAX_DIES)
diff --git a/src/northbridge/amd/agesa/family15/root_complex/chip.h b/src/northbridge/amd/agesa/family15/root_complex/chip.h
deleted file mode 100644
index 8f670f6b94..0000000000
--- a/src/northbridge/amd/agesa/family15/root_complex/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family15_root_complex_config
-{
-};
-
diff --git a/src/northbridge/amd/agesa/family15tn/chip.h b/src/northbridge/amd/agesa/family15tn/chip.h
deleted file mode 100644
index 091de82f6d..0000000000
--- a/src/northbridge/amd/agesa/family15tn/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family15tn_config
-{
-};
-
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index 5d50b09b88..ac605b0304 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -40,9 +40,7 @@
#include <cpu/amd/amdfam15.h>
#include <cpuRegisters.h>
#include "agesawrapper.h"
-#include "root_complex/chip.h"
#include "northbridge.h"
-#include "chip.h"
#define MAX_NODE_NUMS (MAX_NODES * MAX_DIES)
diff --git a/src/northbridge/amd/agesa/family15tn/root_complex/chip.h b/src/northbridge/amd/agesa/family15tn/root_complex/chip.h
deleted file mode 100644
index 0306fdd08b..0000000000
--- a/src/northbridge/amd/agesa/family15tn/root_complex/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family15tn_root_complex_config
-{
-};
-
diff --git a/src/northbridge/amd/amdfam10/chip.h b/src/northbridge/amd/amdfam10/chip.h
deleted file mode 100644
index a8161cbb35..0000000000
--- a/src/northbridge/amd/amdfam10/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_amd_amdfam10_config
-{
-};
-
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index a30bd91791..7f05b46aa5 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -37,8 +37,6 @@
#include <pc80/mc146818rtc.h>
#endif
-#include "chip.h"
-#include "root_complex/chip.h"
#include "northbridge.h"
#include "amdfam10.h"
diff --git a/src/northbridge/amd/amdfam10/root_complex/chip.h b/src/northbridge/amd/amdfam10/root_complex/chip.h
deleted file mode 100644
index 8c93020f7b..0000000000
--- a/src/northbridge/amd/amdfam10/root_complex/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_amd_amdfam10_root_complex_config
-{
-};
-
diff --git a/src/northbridge/amd/amdk8/chip.h b/src/northbridge/amd/amdk8/chip.h
deleted file mode 100644
index a2331f41a2..0000000000
--- a/src/northbridge/amd/amdk8/chip.h
+++ /dev/null
@@ -1,4 +0,0 @@
-struct northbridge_amd_amdk8_config
-{
-};
-
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index eba018fa3e..4d14efabcc 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -25,8 +25,6 @@
#include <pc80/mc146818rtc.h>
#endif
-#include "chip.h"
-#include "root_complex/chip.h"
#include "northbridge.h"
#include "amdk8.h"
diff --git a/src/northbridge/amd/amdk8/root_complex/chip.h b/src/northbridge/amd/amdk8/root_complex/chip.h
deleted file mode 100644
index a9b6b5b2cd..0000000000
--- a/src/northbridge/amd/amdk8/root_complex/chip.h
+++ /dev/null
@@ -1,4 +0,0 @@
-struct northbridge_amd_amdk8_root_complex_config
-{
-};
-
diff --git a/src/northbridge/amd/gx1/chip.h b/src/northbridge/amd/gx1/chip.h
deleted file mode 100644
index 0378b61f2e..0000000000
--- a/src/northbridge/amd/gx1/chip.h
+++ /dev/null
@@ -1,4 +0,0 @@
-struct northbridge_amd_gx1_config
-{
-};
-
diff --git a/src/northbridge/amd/gx1/northbridge.c b/src/northbridge/amd/gx1/northbridge.c
index 5c59f7314a..fbea3b58a3 100644
--- a/src/northbridge/amd/gx1/northbridge.c
+++ b/src/northbridge/amd/gx1/northbridge.c
@@ -7,7 +7,6 @@
#include <stdlib.h>
#include <string.h>
#include <bitops.h>
-#include "chip.h"
#include "northbridge.h"
#include <cpu/amd/gx1def.h>
#include <cpu/x86/cache.h>
diff --git a/src/northbridge/amd/gx2/chip.h b/src/northbridge/amd/gx2/chip.h
deleted file mode 100644
index 1e266c6dc5..0000000000
--- a/src/northbridge/amd/gx2/chip.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_amd_gx2_config
-{
-
-};
-
diff --git a/src/northbridge/amd/gx2/northbridge.c b/src/northbridge/amd/gx2/northbridge.c
index 8da37b4ebf..12096d85fe 100644
--- a/src/northbridge/amd/gx2/northbridge.c
+++ b/src/northbridge/amd/gx2/northbridge.c
@@ -27,7 +27,6 @@
#include <stdlib.h>
#include <string.h>
#include <bitops.h>
-#include "chip.h"
#include "northbridge.h"
#include <cpu/x86/msr.h>
#include <cpu/x86/cache.h>
diff --git a/src/northbridge/amd/gx2/northbridgeinit.c b/src/northbridge/amd/gx2/northbridgeinit.c
index 37fcf7e307..f51bcc6b36 100644
--- a/src/northbridge/amd/gx2/northbridgeinit.c
+++ b/src/northbridge/amd/gx2/northbridgeinit.c
@@ -27,7 +27,6 @@
#include <stdlib.h>
#include <string.h>
#include <bitops.h>
-#include "chip.h"
#include "northbridge.h"
#include <cpu/amd/gx2def.h>
#include <cpu/x86/msr.h>
diff --git a/src/northbridge/amd/lx/chip.h b/src/northbridge/amd/lx/chip.h
deleted file mode 100644
index 12b50fbecf..0000000000
--- a/src/northbridge/amd/lx/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_amd_lx_config {
-};
-
diff --git a/src/northbridge/amd/lx/northbridge.c b/src/northbridge/amd/lx/northbridge.c
index 9ceceb8740..5f98b4051e 100644
--- a/src/northbridge/amd/lx/northbridge.c
+++ b/src/northbridge/amd/lx/northbridge.c
@@ -33,7 +33,6 @@
#include <cpu/x86/cache.h>
#include <cpu/amd/vr.h>
#include <cpu/cpu.h>
-#include "chip.h"
#include "northbridge.h"
#include "../../../southbridge/amd/cs5536/cs5536.h"
diff --git a/src/northbridge/amd/lx/northbridgeinit.c b/src/northbridge/amd/lx/northbridgeinit.c
index 54cc057383..6288608095 100644
--- a/src/northbridge/amd/lx/northbridgeinit.c
+++ b/src/northbridge/amd/lx/northbridgeinit.c
@@ -27,7 +27,6 @@
#include <stdlib.h>
#include <string.h>
#include <bitops.h>
-#include "chip.h"
#include "northbridge.h"
#include <cpu/amd/lxdef.h>
#include <cpu/x86/msr.h>
diff --git a/src/northbridge/intel/e7501/chip.h b/src/northbridge/intel/e7501/chip.h
deleted file mode 100644
index 112c03cdc4..0000000000
--- a/src/northbridge/intel/e7501/chip.h
+++ /dev/null
@@ -1,4 +0,0 @@
-struct northbridge_intel_e7501_config
-{
-};
-
diff --git a/src/northbridge/intel/e7501/northbridge.c b/src/northbridge/intel/e7501/northbridge.c
index 1fa77d7931..c70f032597 100644
--- a/src/northbridge/intel/e7501/northbridge.c
+++ b/src/northbridge/intel/e7501/northbridge.c
@@ -7,7 +7,6 @@
#include <stdlib.h>
#include <string.h>
#include <bitops.h>
-#include "chip.h"
#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
diff --git a/src/northbridge/intel/e7505/chip.h b/src/northbridge/intel/e7505/chip.h
deleted file mode 100644
index 8fd3cdcfb0..0000000000
--- a/src/northbridge/intel/e7505/chip.h
+++ /dev/null
@@ -1,4 +0,0 @@
-struct northbridge_intel_e7505_config
-{
-};
-
diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c
index 9046f43687..b6d24fa98b 100644
--- a/src/northbridge/intel/e7505/northbridge.c
+++ b/src/northbridge/intel/e7505/northbridge.c
@@ -7,7 +7,6 @@
#include <stdlib.h>
#include <string.h>
#include <bitops.h>
-#include "chip.h"
#include "e7505.h"
#if CONFIG_WRITE_HIGH_TABLES
diff --git a/src/northbridge/intel/i440bx/chip.h b/src/northbridge/intel/i440bx/chip.h
deleted file mode 100644
index 15ecb4d735..0000000000
--- a/src/northbridge/intel/i440bx/chip.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_intel_i440bx_config
-{
-};
-
diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c
index 18e57167b4..39bd6b9aca 100644
--- a/src/northbridge/intel/i440bx/northbridge.c
+++ b/src/northbridge/intel/i440bx/northbridge.c
@@ -9,7 +9,6 @@
#include <bitops.h>
#include <cpu/cpu.h>
#include <pc80/keyboard.h>
-#include "chip.h"
#include "northbridge.h"
#include "i440bx.h"
diff --git a/src/northbridge/intel/i440lx/chip.h b/src/northbridge/intel/i440lx/chip.h
deleted file mode 100644
index 19a9b26980..0000000000
--- a/src/northbridge/intel/i440lx/chip.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2009 Maciej Pijanka <maciej.pijanka@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_intel_i440lx_config
-{
-};
-
diff --git a/src/northbridge/intel/i440lx/northbridge.c b/src/northbridge/intel/i440lx/northbridge.c
index f34b5abaa8..57fcfcb8a7 100644
--- a/src/northbridge/intel/i440lx/northbridge.c
+++ b/src/northbridge/intel/i440lx/northbridge.c
@@ -30,7 +30,6 @@
#include <bitops.h>
#include <cpu/cpu.h>
#include <pc80/keyboard.h>
-#include "chip.h"
#include "northbridge.h"
#include "i440lx.h"
diff --git a/src/northbridge/intel/i5000/chip.h b/src/northbridge/intel/i5000/chip.h
deleted file mode 100644
index 214ffcf23b..0000000000
--- a/src/northbridge/intel/i5000/chip.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_intel_i5000_config {
-};
-
diff --git a/src/northbridge/intel/i5000/northbridge.c b/src/northbridge/intel/i5000/northbridge.c
index ea3665caf9..1548f19366 100644
--- a/src/northbridge/intel/i5000/northbridge.c
+++ b/src/northbridge/intel/i5000/northbridge.c
@@ -29,7 +29,6 @@
#include <cpu/cpu.h>
#include <arch/acpi.h>
#include <cbmem.h>
-#include "chip.h"
#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
#endif
diff --git a/src/northbridge/intel/i82810/chip.h b/src/northbridge/intel/i82810/chip.h
deleted file mode 100644
index c57167756a..0000000000
--- a/src/northbridge/intel/i82810/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Corey Osgood <corey.osgood@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_intel_i82810_config {
-};
-
diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c
index 5c51b9aac2..4c09d44d95 100644
--- a/src/northbridge/intel/i82810/northbridge.c
+++ b/src/northbridge/intel/i82810/northbridge.c
@@ -29,7 +29,6 @@
#include <string.h>
#include <bitops.h>
#include <cpu/cpu.h>
-#include "chip.h"
#include "northbridge.h"
#include "i82810.h"
diff --git a/src/northbridge/intel/i82830/chip.h b/src/northbridge/intel/i82830/chip.h
deleted file mode 100644
index d0360fe925..0000000000
--- a/src/northbridge/intel/i82830/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Joseph Smith <joe@smittys.pointclark.net>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_intel_i82830_config {
-};
-
diff --git a/src/northbridge/intel/i82830/northbridge.c b/src/northbridge/intel/i82830/northbridge.c
index f3341d4d33..95ac2edd5d 100644
--- a/src/northbridge/intel/i82830/northbridge.c
+++ b/src/northbridge/intel/i82830/northbridge.c
@@ -28,7 +28,6 @@
#include <stdlib.h>
#include <string.h>
#include <bitops.h>
-#include "chip.h"
#include "i82830.h"
static void northbridge_init(device_t dev)
diff --git a/src/northbridge/intel/i855/chip.h b/src/northbridge/intel/i855/chip.h
deleted file mode 100644
index 40b1d38e1a..0000000000
--- a/src/northbridge/intel/i855/chip.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2006 Jon Dufresne <jon.dufresne@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_intel_i855_config
-{
-};
-
diff --git a/src/northbridge/intel/i855/northbridge.c b/src/northbridge/intel/i855/northbridge.c
index b59ba50a8b..74e2c766a7 100644
--- a/src/northbridge/intel/i855/northbridge.c
+++ b/src/northbridge/intel/i855/northbridge.c
@@ -31,7 +31,6 @@
#include <bitops.h>
#include <cpu/x86/cache.h>
#include <cpu/cpu.h>
-#include "chip.h"
static void northbridge_init(device_t dev)
{
diff --git a/src/northbridge/intel/i945/chip.h b/src/northbridge/intel/i945/chip.h
deleted file mode 100644
index 2deb985bb0..0000000000
--- a/src/northbridge/intel/i945/chip.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2008 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_intel_i945_config {
-};
-
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index 41b15cfabe..684bb7195d 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -29,7 +29,6 @@
#include <bitops.h>
#include <cpu/cpu.h>
#include <arch/acpi.h>
-#include "chip.h"
#include "i945.h"
static int get_pcie_bar(u32 *base, u32 *len)
diff --git a/src/northbridge/intel/sch/chip.h b/src/northbridge/intel/sch/chip.h
deleted file mode 100644
index b3aebd35c8..0000000000
--- a/src/northbridge/intel/sch/chip.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2010 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_intel_sch_config {
-};
-
diff --git a/src/northbridge/intel/sch/northbridge.c b/src/northbridge/intel/sch/northbridge.c
index 48556e2f92..16ada2fa6c 100644
--- a/src/northbridge/intel/sch/northbridge.c
+++ b/src/northbridge/intel/sch/northbridge.c
@@ -29,7 +29,6 @@
#include <bitops.h>
#include <cpu/cpu.h>
#include <arch/acpi.h>
-#include "chip.h"
#include "sch.h"
static int get_pcie_bar(u32 *base, u32 *len)
diff --git a/src/northbridge/rdc/r8610/chip.h b/src/northbridge/rdc/r8610/chip.h
deleted file mode 100644
index 150f032d69..0000000000
--- a/src/northbridge/rdc/r8610/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Corey Osgood <corey.osgood@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_rdc_r8610_config {
-};
-
diff --git a/src/northbridge/rdc/r8610/northbridge.c b/src/northbridge/rdc/r8610/northbridge.c
index 250ace01ac..65fd5ebf72 100644
--- a/src/northbridge/rdc/r8610/northbridge.c
+++ b/src/northbridge/rdc/r8610/northbridge.c
@@ -30,7 +30,6 @@
#include <string.h>
#include <bitops.h>
#include <smbios.h>
-#include "chip.h"
#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
diff --git a/src/northbridge/via/cn400/agp.c b/src/northbridge/via/cn400/agp.c
index a302759371..f6dbc696ee 100644
--- a/src/northbridge/via/cn400/agp.c
+++ b/src/northbridge/via/cn400/agp.c
@@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include "chip.h"
#include "northbridge.h"
#include "cn400.h"
diff --git a/src/northbridge/via/cn400/chip.h b/src/northbridge/via/cn400/chip.h
deleted file mode 100644
index e403d352c0..0000000000
--- a/src/northbridge/via/cn400/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Corey Osgood <corey.osgood@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_via_cn400_config {
-};
-
diff --git a/src/northbridge/via/cn400/northbridge.c b/src/northbridge/via/cn400/northbridge.c
index 74e0edff53..61d7345d99 100644
--- a/src/northbridge/via/cn400/northbridge.c
+++ b/src/northbridge/via/cn400/northbridge.c
@@ -30,7 +30,6 @@
#include <string.h>
#include <bitops.h>
#include <cpu/cpu.h>
-#include "chip.h"
#include "northbridge.h"
#include "cn400.h"
diff --git a/src/northbridge/via/cn400/vga.c b/src/northbridge/via/cn400/vga.c
index 7641a81012..8c75a4fa30 100644
--- a/src/northbridge/via/cn400/vga.c
+++ b/src/northbridge/via/cn400/vga.c
@@ -34,7 +34,6 @@
#include <bitops.h>
#include <cpu/cpu.h>
#include <arch/interrupt.h>
-#include "chip.h"
#include "northbridge.h"
#include "cn400.h"
diff --git a/src/northbridge/via/cn400/vlink.c b/src/northbridge/via/cn400/vlink.c
index dc574c130d..85a0fc676f 100644
--- a/src/northbridge/via/cn400/vlink.c
+++ b/src/northbridge/via/cn400/vlink.c
@@ -22,7 +22,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include "chip.h"
#include "northbridge.h"
#include "cn400.h"
diff --git a/src/northbridge/via/cn700/agp.c b/src/northbridge/via/cn700/agp.c
index 327fac4ea2..ba84f7987d 100644
--- a/src/northbridge/via/cn700/agp.c
+++ b/src/northbridge/via/cn700/agp.c
@@ -24,7 +24,6 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
-#include "chip.h"
#include "northbridge.h"
#include "cn700.h"
diff --git a/src/northbridge/via/cn700/chip.h b/src/northbridge/via/cn700/chip.h
deleted file mode 100644
index 5b1515dc8f..0000000000
--- a/src/northbridge/via/cn700/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Corey Osgood <corey.osgood@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_via_cn700_config {
-};
-
diff --git a/src/northbridge/via/cn700/northbridge.c b/src/northbridge/via/cn700/northbridge.c
index ced4c2f740..837ec8572e 100644
--- a/src/northbridge/via/cn700/northbridge.c
+++ b/src/northbridge/via/cn700/northbridge.c
@@ -30,7 +30,6 @@
#include <string.h>
#include <bitops.h>
#include <cpu/cpu.h>
-#include "chip.h"
#include "northbridge.h"
#include "cn700.h"
diff --git a/src/northbridge/via/cn700/vga.c b/src/northbridge/via/cn700/vga.c
index 33d1fe0071..d184644fd4 100644
--- a/src/northbridge/via/cn700/vga.c
+++ b/src/northbridge/via/cn700/vga.c
@@ -34,7 +34,6 @@
#include <bitops.h>
#include <cpu/cpu.h>
#include <arch/interrupt.h>
-#include "chip.h"
#include "northbridge.h"
#include "cn700.h"
diff --git a/src/northbridge/via/cx700/chip.h b/src/northbridge/via/cx700/chip.h
deleted file mode 100644
index 0e8491bbb4..0000000000
--- a/src/northbridge/via/cx700/chip.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_via_cx700_config {
-};
-
diff --git a/src/northbridge/via/cx700/northbridge.c b/src/northbridge/via/cx700/northbridge.c
index 4fca723472..1df9ce0814 100644
--- a/src/northbridge/via/cx700/northbridge.c
+++ b/src/northbridge/via/cx700/northbridge.c
@@ -29,7 +29,6 @@
#include <bitops.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
-#include "chip.h"
#include "northbridge.h"
#if CONFIG_WRITE_HIGH_TABLES
diff --git a/src/northbridge/via/cx700/vga.c b/src/northbridge/via/cx700/vga.c
index 91dd8649e9..821edc4992 100644
--- a/src/northbridge/via/cx700/vga.c
+++ b/src/northbridge/via/cx700/vga.c
@@ -31,7 +31,6 @@
#include <cpu/x86/msr.h>
#include <arch/interrupt.h>
#include "registers.h"
-#include "chip.h"
#include "northbridge.h"
/* PCI Domain 1 Device 0 Function 0 */
diff --git a/src/northbridge/via/vt8601/chip.h b/src/northbridge/via/vt8601/chip.h
deleted file mode 100644
index c65e12e54c..0000000000
--- a/src/northbridge/via/vt8601/chip.h
+++ /dev/null
@@ -1,4 +0,0 @@
-struct northbridge_via_vt8601_config
-{
-};
-
diff --git a/src/northbridge/via/vt8601/northbridge.c b/src/northbridge/via/vt8601/northbridge.c
index 92adf3206f..f5f084c17a 100644
--- a/src/northbridge/via/vt8601/northbridge.c
+++ b/src/northbridge/via/vt8601/northbridge.c
@@ -9,7 +9,6 @@
#include <stdlib.h>
#include <string.h>
#include <bitops.h>
-#include "chip.h"
#include "northbridge.h"
/*
diff --git a/src/northbridge/via/vt8623/chip.h b/src/northbridge/via/vt8623/chip.h
deleted file mode 100644
index 5fb3f80999..0000000000
--- a/src/northbridge/via/vt8623/chip.h
+++ /dev/null
@@ -1,4 +0,0 @@
-struct northbridge_via_vt8623_config
-{
-};
-
diff --git a/src/northbridge/via/vt8623/northbridge.c b/src/northbridge/via/vt8623/northbridge.c
index 5ea2212993..76cd7a052c 100644
--- a/src/northbridge/via/vt8623/northbridge.c
+++ b/src/northbridge/via/vt8623/northbridge.c
@@ -11,7 +11,6 @@
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
-#include "chip.h"
#include "northbridge.h"
/*
diff --git a/src/northbridge/via/vt8623/vga.c b/src/northbridge/via/vt8623/vga.c
index 933c73381a..20857a69a8 100644
--- a/src/northbridge/via/vt8623/vga.c
+++ b/src/northbridge/via/vt8623/vga.c
@@ -30,7 +30,6 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <arch/interrupt.h>
-#include "chip.h"
#include "northbridge.h"
static int via_vt8623_int15_handler(struct eregs *regs)
diff --git a/src/northbridge/via/vx800/chip.h b/src/northbridge/via/vx800/chip.h
deleted file mode 100644
index 64df31af51..0000000000
--- a/src/northbridge/via/vx800/chip.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2009 One Laptop per Child, Association, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-struct northbridge_via_vx800_config {
-};
-
diff --git a/src/northbridge/via/vx800/ide.c b/src/northbridge/via/vx800/ide.c
index 9fa8f35dbe..4ed4879684 100644
--- a/src/northbridge/via/vx800/ide.c
+++ b/src/northbridge/via/vx800/ide.c
@@ -22,7 +22,6 @@
#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <console/console.h>
-#include "chip.h"
#include <arch/io.h>
#include "vx800.h"
@@ -191,10 +190,6 @@ static void ide_init(struct device *dev)
pci_write_config8(dev, PCI_INTERRUPT_PIN, 0x0);
pci_write_config8(dev, PCI_INTERRUPT_LINE, 0xff);
#if 0
-
- struct southbridge_via_vt8237r_config *sb =
- (struct southbridge_via_vt8237r_config *)dev->chip_info;
-
u8 enables;
u32 cablesel;
diff --git a/src/northbridge/via/vx800/lpc.c b/src/northbridge/via/vx800/lpc.c
index b9941d1270..b5cd5a3d1c 100644
--- a/src/northbridge/via/vx800/lpc.c
+++ b/src/northbridge/via/vx800/lpc.c
@@ -28,7 +28,6 @@
#include <pc80/keyboard.h>
#include <pc80/i8259.h>
#include "vx800.h"
-#include "chip.h"
static const unsigned char pciIrqs[4] = { 0xa, 0x9, 0xb, 0xa };
diff --git a/src/northbridge/via/vx800/northbridge.c b/src/northbridge/via/vx800/northbridge.c
index f3cfa418aa..6274e2333e 100644
--- a/src/northbridge/via/vx800/northbridge.c
+++ b/src/northbridge/via/vx800/northbridge.c
@@ -31,7 +31,6 @@
#include <string.h>
#include <bitops.h>
#include <cpu/cpu.h>
-#include "chip.h"
#include "northbridge.h"
#include "vx800.h"
diff --git a/src/northbridge/via/vx800/vga.c b/src/northbridge/via/vx800/vga.c
index e43801263e..bb7de9ec9d 100644
--- a/src/northbridge/via/vx800/vga.c
+++ b/src/northbridge/via/vx800/vga.c
@@ -33,7 +33,6 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <arch/interrupt.h>
-#include "chip.h"
#include "northbridge.h"
/* PCI Domain 1 Device 0 Function 0 */
diff --git a/src/southbridge/amd/cimx/sb700/chip_name.c b/src/southbridge/amd/cimx/sb700/chip_name.c
deleted file mode 100644
index 13d2276641..0000000000
--- a/src/southbridge/amd/cimx/sb700/chip_name.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <device/device.h>
-#include "chip.h"
-
-struct chip_operations southbridge_amd_cimx_sb700_ops = {
- CHIP_NAME("AMD South Bridge SB700")
-};
diff --git a/src/southbridge/amd/cimx/sb800/chip_name.c b/src/southbridge/amd/cimx/sb800/chip_name.c
deleted file mode 100644
index 9ce89d6591..0000000000
--- a/src/southbridge/amd/cimx/sb800/chip_name.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <device/device.h>
-#include "chip.h"
-
-struct chip_operations southbridge_amd_cimx_sb800_ops = {
- CHIP_NAME("AMD South Bridge SB800")
-};
diff --git a/src/southbridge/amd/cimx/sb900/chip_name.c b/src/southbridge/amd/cimx/sb900/chip_name.c
deleted file mode 100644
index dd875dcfd6..0000000000
--- a/src/southbridge/amd/cimx/sb900/chip_name.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <device/device.h>
-#include "chip.h"
-
-struct chip_operations southbridge_amd_cimx_sb900_ops = {
- CHIP_NAME("AMD South Bridge SB900")
-};
diff --git a/src/southbridge/intel/i82801cx/chip.h b/src/southbridge/intel/i82801cx/chip.h
deleted file mode 100644
index 56185213eb..0000000000
--- a/src/southbridge/intel/i82801cx/chip.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#ifndef I82801CX_CHIP_H
-#define I82801CX_CHIP_H
-
-struct southbridge_intel_i82801cx_config
-{
-};
-
-#endif /* I82801CX_CHIP_H */
diff --git a/src/southbridge/intel/i82801cx/i82801cx.h b/src/southbridge/intel/i82801cx/i82801cx.h
index da518a3660..28428830e2 100644
--- a/src/southbridge/intel/i82801cx/i82801cx.h
+++ b/src/southbridge/intel/i82801cx/i82801cx.h
@@ -3,7 +3,6 @@
#if !defined(__PRE_RAM__)
#include <device/device.h>
-#include "chip.h"
void i82801cx_enable(device_t dev);
void i82801cx_hard_reset(void);
#endif
diff --git a/src/southbridge/intel/pxhd/chip.h b/src/southbridge/intel/pxhd/chip.h
deleted file mode 100644
index 27d88a8277..0000000000
--- a/src/southbridge/intel/pxhd/chip.h
+++ /dev/null
@@ -1,5 +0,0 @@
-struct southbridge_intel_pxhd_config
-{
- /* nothing */
-};
-
diff --git a/src/southbridge/intel/pxhd/pxhd.h b/src/southbridge/intel/pxhd/pxhd.h
index c3e6ce5cd7..b0e8cdbfce 100644
--- a/src/southbridge/intel/pxhd/pxhd.h
+++ b/src/southbridge/intel/pxhd/pxhd.h
@@ -1,6 +1,5 @@
#ifndef PXHD_H
#define PXHD_H
-#include "chip.h"
#endif /* PXHD_H */
diff --git a/src/southbridge/ti/pcixx12/chip.h b/src/southbridge/ti/pcixx12/chip.h
deleted file mode 100644
index 03151a8916..0000000000
--- a/src/southbridge/ti/pcixx12/chip.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _SOUTHBRIDGE_TI_PCIXX12
-#define _SOUTHBRIDGE_TI_PCIXX12
-
-struct southbridge_ti_pcixx12_config {
- int dummy;
-
-};
-
-#endif /* _SOUTHBRIDGE_TI_PCIXX12 */
diff --git a/src/southbridge/ti/pcixx12/pcixx12.c b/src/southbridge/ti/pcixx12/pcixx12.c
index 0ea3b1130d..5e62292674 100644
--- a/src/southbridge/ti/pcixx12/pcixx12.c
+++ b/src/southbridge/ti/pcixx12/pcixx12.c
@@ -24,7 +24,6 @@
#include <device/pci_ids.h>
#include <console/console.h>
#include <device/cardbus.h>
-#include "chip.h"
static void pcixx12_init(device_t dev)
{
@@ -62,7 +61,6 @@ static const struct pci_driver ti_pcixx12_driver __pci_driver = {
static void southbridge_init(device_t dev)
{
- // struct southbridge_ti_pcixx12_config *config = dev->chip_info;
}
struct chip_operations southbridge_ti_pcixx12_ops = {
diff --git a/src/superio/fintek/f71805f/chip.h b/src/superio/fintek/f71805f/chip.h
deleted file mode 100644
index 603dbee365..0000000000
--- a/src/superio/fintek/f71805f/chip.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Corey Osgood <corey@slightlyhackish.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef SUPERIO_FINTEK_F71805F_CHIP_H
-#define SUPERIO_FINTEK_F71805F_CHIP_H
-
-#include <device/device.h>
-#include <uart8250.h>
-
-/* This chip doesn't have keyboard and mouse support. */
-
-struct superio_fintek_f71805f_config {
-
-};
-
-#endif
diff --git a/src/superio/fintek/f71805f/superio.c b/src/superio/fintek/f71805f/superio.c
index 5f179466ca..afe5b8caec 100644
--- a/src/superio/fintek/f71805f/superio.c
+++ b/src/superio/fintek/f71805f/superio.c
@@ -24,7 +24,6 @@
#include <console/console.h>
#include <stdlib.h>
#include <uart8250.h>
-#include "chip.h"
#include "f71805f.h"
static void pnp_enter_conf_state(device_t dev)
diff --git a/src/superio/fintek/f71859/chip.h b/src/superio/fintek/f71859/chip.h
deleted file mode 100644
index bd45ac0376..0000000000
--- a/src/superio/fintek/f71859/chip.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Marc Jones <marcj303@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef SUPERIO_FINTEK_F71859_CHIP_H
-#define SUPERIO_FINTEK_F71859_CHIP_H
-
-#include <device/device.h>
-#include <uart8250.h>
-
-struct superio_fintek_f71859_config {
-
-};
-
-#endif
diff --git a/src/superio/fintek/f71859/superio.c b/src/superio/fintek/f71859/superio.c
index 809140b5a1..a0158ba7b2 100644
--- a/src/superio/fintek/f71859/superio.c
+++ b/src/superio/fintek/f71859/superio.c
@@ -25,7 +25,6 @@
#include <console/console.h>
#include <stdlib.h>
#include <uart8250.h>
-#include "chip.h"
#include "f71859.h"
static void pnp_enter_conf_state(device_t dev)
diff --git a/src/superio/intel/i3100/chip.h b/src/superio/intel/i3100/chip.h
deleted file mode 100644
index 05e2f452bf..0000000000
--- a/src/superio/intel/i3100/chip.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Arastra, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef SUPERIO_INTEL_I3100_CHIP_H
-#define SUPERIO_INTEL_I3100_CHIP_H
-
-#include <device/device.h>
-#include <uart8250.h>
-
-struct superio_intel_i3100_config {
-};
-
-#endif
diff --git a/src/superio/intel/i3100/superio.c b/src/superio/intel/i3100/superio.c
index 74862eb6ff..b8c107d969 100644
--- a/src/superio/intel/i3100/superio.c
+++ b/src/superio/intel/i3100/superio.c
@@ -22,7 +22,6 @@
#include <device/device.h>
#include <device/pnp.h>
#include <uart8250.h>
-#include "chip.h"
#include "i3100.h"
#include <arch/io.h>
diff --git a/src/superio/ite/it8661f/chip.h b/src/superio/ite/it8661f/chip.h
deleted file mode 100644
index 1d9d1f9ba3..0000000000
--- a/src/superio/ite/it8661f/chip.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef SUPERIO_ITE_IT8661F_CHIP_H
-#define SUPERIO_ITE_IT8661F_CHIP_H
-
-/* This chip doesn't have keyboard and mouse support. */
-
-#include <device/device.h>
-#include <uart8250.h>
-
-struct superio_ite_it8661f_config {
-
-};
-
-#endif
diff --git a/src/superio/ite/it8661f/superio.c b/src/superio/ite/it8661f/superio.c
index fcf54e7dc3..a348a7f3d3 100644
--- a/src/superio/ite/it8661f/superio.c
+++ b/src/superio/ite/it8661f/superio.c
@@ -22,7 +22,6 @@
#include <device/pnp.h>
#include <uart8250.h>
#include <stdlib.h>
-#include "chip.h"
#include "it8661f.h"
/* TODO: Add pnp_enter_ext_func_mode() etc. and wrap functions. */
diff --git a/src/superio/ite/it8705f/chip.h b/src/superio/ite/it8705f/chip.h
deleted file mode 100644
index ac2ba77e87..0000000000
--- a/src/superio/ite/it8705f/chip.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef SUPERIO_ITE_IT8705F_CHIP_H
-#define SUPERIO_ITE_IT8705F_CHIP_H
-
-/* This chip doesn't have keyboard and mouse support. */
-
-#include <device/device.h>
-#include <uart8250.h>
-
-struct superio_ite_it8705f_config {
-
-};
-
-#endif
diff --git a/src/superio/ite/it8705f/superio.c b/src/superio/ite/it8705f/superio.c
index 8f14a34c53..8992ea2bff 100644
--- a/src/superio/ite/it8705f/superio.c
+++ b/src/superio/ite/it8705f/superio.c
@@ -22,13 +22,10 @@
#include <device/pnp.h>
#include <uart8250.h>
#include <stdlib.h>
-#include "chip.h"
#include "it8705f.h"
static void init(device_t dev)
{
- struct superio_ite_it8705f_config *conf = dev->chip_info;
-
if (!dev->enabled)
return;
diff --git a/src/superio/nsc/pc87382/chip.h b/src/superio/nsc/pc87382/chip.h
deleted file mode 100644
index a9f0200f18..0000000000
--- a/src/superio/nsc/pc87382/chip.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef SUPERIO_NSC_PC87382_CHIP_H
-#define SUPERIO_NSC_PC87382_CHIP_H
-
-#include <uart8250.h>
-
-struct superio_nsc_pc87382_config {
-
-};
-
-#endif
diff --git a/src/superio/nsc/pc87382/superio.c b/src/superio/nsc/pc87382/superio.c
index 7f4afe3d27..9d4bee0f7a 100644
--- a/src/superio/nsc/pc87382/superio.c
+++ b/src/superio/nsc/pc87382/superio.c
@@ -27,7 +27,6 @@
#include <uart8250.h>
#include <pc80/keyboard.h>
#include <stdlib.h>
-#include "chip.h"
#include "pc87382.h"
static void init(device_t dev)
diff --git a/src/superio/nsc/pc87384/chip.h b/src/superio/nsc/pc87384/chip.h
deleted file mode 100644
index 1c49725235..0000000000
--- a/src/superio/nsc/pc87384/chip.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef SUPERIO_NSC_PC87384_CHIP_H
-#define SUPERIO_NSC_PC87384_CHIP_H
-
-#include <uart8250.h>
-
-struct superio_nsc_pc87384_config {
-
-};
-
-#endif
diff --git a/src/superio/nsc/pc87384/superio.c b/src/superio/nsc/pc87384/superio.c
index 11ddc822aa..39177fd7d2 100644
--- a/src/superio/nsc/pc87384/superio.c
+++ b/src/superio/nsc/pc87384/superio.c
@@ -27,7 +27,6 @@
#include <uart8250.h>
#include <pc80/keyboard.h>
#include <stdlib.h>
-#include "chip.h"
#include "pc87384.h"
static struct device_operations ops = {
diff --git a/src/superio/nsc/pc87392/chip.h b/src/superio/nsc/pc87392/chip.h
deleted file mode 100644
index a6ebf1b5d9..0000000000
--- a/src/superio/nsc/pc87392/chip.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef SUPERIO_NSC_PC87392_CHIP_H
-#define SUPERIO_NSC_PC87392_CHIP_H
-
-#include <uart8250.h>
-
-struct superio_nsc_pc87392_config {
-
-};
-
-#endif
diff --git a/src/superio/nsc/pc87392/superio.c b/src/superio/nsc/pc87392/superio.c
index 1b527ad679..81c679c36c 100644
--- a/src/superio/nsc/pc87392/superio.c
+++ b/src/superio/nsc/pc87392/superio.c
@@ -26,7 +26,6 @@
#include <bitops.h>
#include <uart8250.h>
#include <stdlib.h>
-#include "chip.h"
#include "pc87392.h"
static void init(device_t dev)
diff --git a/src/superio/smsc/lpc47n217/chip.h b/src/superio/smsc/lpc47n217/chip.h
deleted file mode 100644
index b0fbe8cfe6..0000000000
--- a/src/superio/smsc/lpc47n217/chip.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2005 Digital Design Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef SUPERIO_SMSC_LPC47N217_CHIP_H
-#define SUPERIO_SMSC_LPC47N217_CHIP_H
-
-#include <uart8250.h>
-
-struct superio_smsc_lpc47n217_config {
-
-};
-
-#endif
diff --git a/src/superio/smsc/lpc47n217/superio.c b/src/superio/smsc/lpc47n217/superio.c
index 01c96b1065..2658831bcd 100644
--- a/src/superio/smsc/lpc47n217/superio.c
+++ b/src/superio/smsc/lpc47n217/superio.c
@@ -33,7 +33,6 @@
#include <uart8250.h>
#include <assert.h>
#include <stdlib.h>
-#include "chip.h"
#include "lpc47n217.h"
/* Forward declarations */
@@ -133,9 +132,6 @@ static void lpc47n217_pnp_enable(device_t dev)
*/
static void lpc47n217_init(device_t dev)
{
- /* TODO: Reserved for future. */
- /* struct superio_smsc_lpc47n217_config* conf = dev->chip_info; */
-
if (!dev->enabled)
return;
}
diff --git a/src/superio/via/vt1211/chip.h b/src/superio/via/vt1211/chip.h
deleted file mode 100644
index 89d64cda20..0000000000
--- a/src/superio/via/vt1211/chip.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2004 Nick Barker <nick.barker9@btinternet.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef SUPERIO_VIA_VT1211_CHIP_H
-#define SUPERIO_VIA_VT1211_CHIP_H
-
-#include <uart8250.h>
-
-struct superio_via_vt1211_config {
-
-};
-
-#endif
diff --git a/src/superio/via/vt1211/vt1211.c b/src/superio/via/vt1211/vt1211.c
index e681d6eb9c..abcae77290 100644
--- a/src/superio/via/vt1211/vt1211.c
+++ b/src/superio/via/vt1211/vt1211.c
@@ -26,7 +26,6 @@
#include <uart8250.h>
#include <stdlib.h>
#include "vt1211.h"
-#include "chip.h"
static u8 hwm_io_regs[] = {
0x10,0x03, 0x11,0x10, 0x12,0x0d, 0x13,0x7f,