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-rw-r--r--src/drivers/spi/spi-generic.c11
-rw-r--r--src/include/spi-generic.h16
-rw-r--r--src/soc/amd/stoneyridge/spi.c2
-rw-r--r--src/soc/intel/quark/spi.c1
-rw-r--r--src/southbridge/amd/agesa/hudson/spi.c2
-rw-r--r--src/southbridge/amd/cimx/sb800/spi.c2
-rw-r--r--src/southbridge/amd/sb700/spi.c2
7 files changed, 27 insertions, 9 deletions
diff --git a/src/drivers/spi/spi-generic.c b/src/drivers/spi/spi-generic.c
index 31a6bc3155..1fcc05d4f3 100644
--- a/src/drivers/spi/spi-generic.c
+++ b/src/drivers/spi/spi-generic.c
@@ -93,15 +93,24 @@ unsigned int spi_crop_chunk(const struct spi_slave *slave, unsigned int cmd_len,
{
const struct spi_ctrlr *ctrlr = slave->ctrlr;
unsigned int ctrlr_max;
+ bool deduct_cmd_len;
+ bool deduct_opcode_len;
if (!ctrlr)
return 0;
+ deduct_cmd_len = !!(ctrlr->flags & SPI_CNTRLR_DEDUCT_CMD_LEN);
+ deduct_opcode_len = !!(ctrlr->flags & SPI_CNTRLR_DEDUCT_OPCODE_LEN);
ctrlr_max = ctrlr->max_xfer_size;
assert (ctrlr_max != 0);
- if (ctrlr->deduct_cmd_len && (ctrlr_max > cmd_len))
+ /* Assume opcode is always one byte and deduct it from the cmd_len
+ as the hardware has a separate register for the opcode. */
+ if (deduct_opcode_len)
+ cmd_len--;
+
+ if (deduct_cmd_len && (ctrlr_max > cmd_len))
ctrlr_max -= cmd_len;
return min(ctrlr_max, buf_len);
diff --git a/src/include/spi-generic.h b/src/include/spi-generic.h
index a3298f8376..20c7cc72c7 100644
--- a/src/include/spi-generic.h
+++ b/src/include/spi-generic.h
@@ -97,6 +97,17 @@ struct spi_cfg {
struct spi_flash;
+enum {
+ /* Deduct the command length from the spi_crop_chunk() calculation for
+ sizing a transaction. */
+ SPI_CNTRLR_DEDUCT_CMD_LEN = 1 << 0,
+ /* Remove the opcode size from the command length used in the
+ spi_crop_chunk() calculation. Controllers which have a dedicated
+ register for the command byte would set this flag which would
+ allow the use of the maximum transfer size. */
+ SPI_CNTRLR_DEDUCT_OPCODE_LEN = 1 << 1,
+};
+
/*-----------------------------------------------------------------------
* Representation of a SPI controller.
*
@@ -108,8 +119,7 @@ struct spi_flash;
* max_xfer_size: Maximum transfer size supported by the controller
* (0 = invalid,
* SPI_CTRLR_DEFAULT_MAX_XFER_SIZE = unlimited)
- * deduct_cmd_len: Whether cmd_len should be deducted from max_xfer_size
- * when calculating max_data_size
+ * flags: See SPI_CNTRLR_* enums above.
*
* Following member is provided by specialized SPI controllers that are
* actually SPI flash controllers.
@@ -127,7 +137,7 @@ struct spi_ctrlr {
int (*xfer_vector)(const struct spi_slave *slave,
struct spi_op vectors[], size_t count);
uint32_t max_xfer_size;
- bool deduct_cmd_len;
+ uint32_t flags;
int (*flash_probe)(const struct spi_slave *slave,
struct spi_flash *flash);
int (*flash_protect)(const struct spi_flash *flash,
diff --git a/src/soc/amd/stoneyridge/spi.c b/src/soc/amd/stoneyridge/spi.c
index 311cd37483..9889727f06 100644
--- a/src/soc/amd/stoneyridge/spi.c
+++ b/src/soc/amd/stoneyridge/spi.c
@@ -193,7 +193,7 @@ static const struct spi_ctrlr spi_ctrlr = {
.xfer = spi_ctrlr_xfer,
.xfer_vector = spi_xfer_two_vectors,
.max_xfer_size = SPI_FIFO_DEPTH,
- .deduct_cmd_len = true,
+ .flags = SPI_CNTRLR_DEDUCT_CMD_LEN,
};
const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
diff --git a/src/soc/intel/quark/spi.c b/src/soc/intel/quark/spi.c
index a6647fb71a..6c1aca98fa 100644
--- a/src/soc/intel/quark/spi.c
+++ b/src/soc/intel/quark/spi.c
@@ -290,7 +290,6 @@ BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL);
const struct spi_ctrlr spi_driver = {
.xfer = xfer,
.max_xfer_size = 64,
- .deduct_cmd_len = false,
};
const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
diff --git a/src/southbridge/amd/agesa/hudson/spi.c b/src/southbridge/amd/agesa/hudson/spi.c
index 46121db752..379594e0a3 100644
--- a/src/southbridge/amd/agesa/hudson/spi.c
+++ b/src/southbridge/amd/agesa/hudson/spi.c
@@ -164,7 +164,7 @@ static const struct spi_ctrlr spi_ctrlr = {
.xfer = spi_ctrlr_xfer,
.xfer_vector = spi_xfer_two_vectors,
.max_xfer_size = AMD_SB_SPI_TX_LEN,
- .deduct_cmd_len = true,
+ .flags = SPI_CNTRLR_DEDUCT_CMD_LEN,
};
const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
diff --git a/src/southbridge/amd/cimx/sb800/spi.c b/src/southbridge/amd/cimx/sb800/spi.c
index f2d62144ee..ba3f643b73 100644
--- a/src/southbridge/amd/cimx/sb800/spi.c
+++ b/src/southbridge/amd/cimx/sb800/spi.c
@@ -155,7 +155,7 @@ static const struct spi_ctrlr spi_ctrlr = {
.xfer = spi_ctrlr_xfer,
.xfer_vector = spi_xfer_two_vectors,
.max_xfer_size = AMD_SB_SPI_TX_LEN,
- .deduct_cmd_len = true,
+ .flags = SPI_CNTRLR_DEDUCT_CMD_LEN,
};
const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
diff --git a/src/southbridge/amd/sb700/spi.c b/src/southbridge/amd/sb700/spi.c
index caddfc88c0..6df47fd309 100644
--- a/src/southbridge/amd/sb700/spi.c
+++ b/src/southbridge/amd/sb700/spi.c
@@ -112,7 +112,7 @@ static const struct spi_ctrlr spi_ctrlr = {
.xfer = spi_ctrlr_xfer,
.xfer_vector = spi_xfer_two_vectors,
.max_xfer_size = AMD_SB_SPI_TX_LEN,
- .deduct_cmd_len = true,
+ .flags = SPI_CNTRLR_DEDUCT_CMD_LEN,
};
const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {