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-rw-r--r--src/mainboard/google/hatch/variants/baseboard/devicetree.cb1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
index bda6e2adfc..dc7cc24916 100644
--- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb
@@ -72,6 +72,7 @@ chip soc/intel/cannonlake
# Enable HPD for DDI ports B/C
register "DdiPortBHpd" = "1"
register "DdiPortCHpd" = "1"
+ register "tcc_offset" = "10" # TCC of 90C
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 0
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 1