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-rw-r--r--src/mainboard/amd/dinar/BiosCallOuts.c12
-rw-r--r--src/mainboard/amd/dinar/BiosCallOuts.h8
-rw-r--r--src/mainboard/amd/inagua/BiosCallOuts.c1
-rw-r--r--src/mainboard/amd/inagua/BiosCallOuts.h8
-rw-r--r--src/mainboard/amd/inagua/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/amd/persimmon/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/amd/south_station/BiosCallOuts.c1
-rw-r--r--src/mainboard/amd/south_station/BiosCallOuts.h9
-rw-r--r--src/mainboard/amd/south_station/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/amd/torpedo/BiosCallOuts.c13
-rw-r--r--src/mainboard/amd/torpedo/BiosCallOuts.h5
-rw-r--r--src/mainboard/amd/torpedo/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/amd/union_station/BiosCallOuts.c1
-rw-r--r--src/mainboard/amd/union_station/BiosCallOuts.h8
-rwxr-xr-xsrc/mainboard/gizmosphere/gizmo/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/lippert/frontrunner-af/BiosCallOuts.c2
-rw-r--r--src/mainboard/lippert/frontrunner-af/BiosCallOuts.h10
-rw-r--r--src/mainboard/lippert/frontrunner-af/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/lippert/frontrunner-af/mainboard.c1
-rw-r--r--src/mainboard/lippert/toucan-af/BiosCallOuts.c2
-rw-r--r--src/mainboard/lippert/toucan-af/BiosCallOuts.h11
-rw-r--r--src/mainboard/lippert/toucan-af/PlatformGnbPcie.c1
-rw-r--r--src/mainboard/lippert/toucan-af/mainboard.c1
-rw-r--r--src/southbridge/amd/cimx/sb700/gpio_oem.h11
-rw-r--r--src/southbridge/amd/cimx/sb800/gpio_oem.h23
26 files changed, 44 insertions, 91 deletions
diff --git a/src/mainboard/amd/dinar/BiosCallOuts.c b/src/mainboard/amd/dinar/BiosCallOuts.c
index 72424f8849..60aa671c04 100644
--- a/src/mainboard/amd/dinar/BiosCallOuts.c
+++ b/src/mainboard/amd/dinar/BiosCallOuts.c
@@ -29,18 +29,6 @@
#include <southbridge/amd/cimx/sb700/smbus_spd.h>
-#ifndef SB_GPIO_REG01
-#define SB_GPIO_REG01 1
-#endif
-
-#ifndef SB_GPIO_REG24
-#define SB_GPIO_REG24 24
-#endif
-
-#ifndef SB_GPIO_REG27
-#define SB_GPIO_REG27 27
-#endif
-
#ifdef __PRE_RAM__
/* This define is used when selecting the appropriate socket for the SPD read
* because this is a multi-socket design.
diff --git a/src/mainboard/amd/dinar/BiosCallOuts.h b/src/mainboard/amd/dinar/BiosCallOuts.h
index 2c86e2f648..0a890a3a04 100644
--- a/src/mainboard/amd/dinar/BiosCallOuts.h
+++ b/src/mainboard/amd/dinar/BiosCallOuts.h
@@ -24,13 +24,5 @@
#include <northbridge/amd/agesa/family15/fam15_callouts.h>
-#define SB_GPIO_REG02 2
-#define SB_GPIO_REG09 9
-#define SB_GPIO_REG10 10
-#define SB_GPIO_REG15 15
-#define SB_GPIO_REG17 17
-#define SB_GPIO_REG21 21
-#define SB_GPIO_REG25 25
-#define SB_GPIO_REG28 28
#endif //_BIOS_CALLOUT_H_
diff --git a/src/mainboard/amd/inagua/BiosCallOuts.c b/src/mainboard/amd/inagua/BiosCallOuts.c
index 56130125ed..4503c30f1c 100644
--- a/src/mainboard/amd/inagua/BiosCallOuts.c
+++ b/src/mainboard/amd/inagua/BiosCallOuts.c
@@ -22,6 +22,7 @@
#include "BiosCallOuts.h"
#include "heapManager.h"
#include "SB800.h"
+#include <southbridge/amd/cimx/sb800/gpio_oem.h>
#include <stdlib.h>
static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
diff --git a/src/mainboard/amd/inagua/BiosCallOuts.h b/src/mainboard/amd/inagua/BiosCallOuts.h
index 0c0d4aa4ad..9c4bef2de7 100644
--- a/src/mainboard/amd/inagua/BiosCallOuts.h
+++ b/src/mainboard/amd/inagua/BiosCallOuts.h
@@ -24,13 +24,5 @@
#include <northbridge/amd/agesa/family14/fam14_callouts.h>
-#define SB_GPIO_REG02 2
-#define SB_GPIO_REG09 9
-#define SB_GPIO_REG10 10
-#define SB_GPIO_REG15 15
-#define SB_GPIO_REG17 17
-#define SB_GPIO_REG21 21
-#define SB_GPIO_REG25 25
-#define SB_GPIO_REG28 28
#endif //_BIOS_CALLOUT_H_
diff --git a/src/mainboard/amd/inagua/PlatformGnbPcie.c b/src/mainboard/amd/inagua/PlatformGnbPcie.c
index 2b0122d055..08cd998c11 100644
--- a/src/mainboard/amd/inagua/PlatformGnbPcie.c
+++ b/src/mainboard/amd/inagua/PlatformGnbPcie.c
@@ -18,7 +18,6 @@
*/
#include "PlatformGnbPcieComplex.h"
-#include "BiosCallOuts.h"
#include <string.h>
#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
diff --git a/src/mainboard/amd/persimmon/PlatformGnbPcie.c b/src/mainboard/amd/persimmon/PlatformGnbPcie.c
index 078f3cb022..de797c0c61 100644
--- a/src/mainboard/amd/persimmon/PlatformGnbPcie.c
+++ b/src/mainboard/amd/persimmon/PlatformGnbPcie.c
@@ -18,7 +18,6 @@
*/
#include "PlatformGnbPcieComplex.h"
-#include "BiosCallOuts.h"
#include <string.h>
#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
diff --git a/src/mainboard/amd/south_station/BiosCallOuts.c b/src/mainboard/amd/south_station/BiosCallOuts.c
index 272a3949a5..cd265ab192 100644
--- a/src/mainboard/amd/south_station/BiosCallOuts.c
+++ b/src/mainboard/amd/south_station/BiosCallOuts.c
@@ -22,6 +22,7 @@
#include "BiosCallOuts.h"
#include "heapManager.h"
#include "SB800.h"
+#include <southbridge/amd/cimx/sb800/gpio_oem.h>
#include <stdlib.h>
static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
diff --git a/src/mainboard/amd/south_station/BiosCallOuts.h b/src/mainboard/amd/south_station/BiosCallOuts.h
index 0c0d4aa4ad..1cb500635d 100644
--- a/src/mainboard/amd/south_station/BiosCallOuts.h
+++ b/src/mainboard/amd/south_station/BiosCallOuts.h
@@ -24,13 +24,4 @@
#include <northbridge/amd/agesa/family14/fam14_callouts.h>
-#define SB_GPIO_REG02 2
-#define SB_GPIO_REG09 9
-#define SB_GPIO_REG10 10
-#define SB_GPIO_REG15 15
-#define SB_GPIO_REG17 17
-#define SB_GPIO_REG21 21
-#define SB_GPIO_REG25 25
-#define SB_GPIO_REG28 28
-
#endif //_BIOS_CALLOUT_H_
diff --git a/src/mainboard/amd/south_station/PlatformGnbPcie.c b/src/mainboard/amd/south_station/PlatformGnbPcie.c
index a0b8d3df13..3798251e1f 100644
--- a/src/mainboard/amd/south_station/PlatformGnbPcie.c
+++ b/src/mainboard/amd/south_station/PlatformGnbPcie.c
@@ -18,7 +18,6 @@
*/
#include "PlatformGnbPcieComplex.h"
-#include "BiosCallOuts.h"
#include <string.h>
#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
diff --git a/src/mainboard/amd/torpedo/BiosCallOuts.c b/src/mainboard/amd/torpedo/BiosCallOuts.c
index 38d4003afb..190cbadfce 100644
--- a/src/mainboard/amd/torpedo/BiosCallOuts.c
+++ b/src/mainboard/amd/torpedo/BiosCallOuts.c
@@ -25,18 +25,7 @@
#include "heapManager.h"
#include "Hudson-2.h"
#include <stdlib.h>
-
-#ifndef SB_GPIO_REG01
-#define SB_GPIO_REG01 1
-#endif
-
-#ifndef SB_GPIO_REG24
-#define SB_GPIO_REG24 24
-#endif
-
-#ifndef SB_GPIO_REG27
-#define SB_GPIO_REG27 27
-#endif
+#include <southbridge/amd/cimx/sb700/gpio_oem.h>
static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
diff --git a/src/mainboard/amd/torpedo/BiosCallOuts.h b/src/mainboard/amd/torpedo/BiosCallOuts.h
index 71d7655cfc..24bf5faff3 100644
--- a/src/mainboard/amd/torpedo/BiosCallOuts.h
+++ b/src/mainboard/amd/torpedo/BiosCallOuts.h
@@ -24,9 +24,4 @@
#include <northbridge/amd/agesa/family12/fam12_callouts.h>
-// These registers are not defined in cimx/SB900/Hudson-2.h
-#define SB_GPIO_REG02 2
-#define SB_GPIO_REG15 15
-#define SB_GPIO_REG25 25
-
#endif //_BIOS_CALLOUT_H_
diff --git a/src/mainboard/amd/torpedo/PlatformGnbPcie.c b/src/mainboard/amd/torpedo/PlatformGnbPcie.c
index 922aa8b1bf..b0b5dd64ba 100644
--- a/src/mainboard/amd/torpedo/PlatformGnbPcie.c
+++ b/src/mainboard/amd/torpedo/PlatformGnbPcie.c
@@ -18,7 +18,6 @@
*/
#include "PlatformGnbPcieComplex.h"
-#include "BiosCallOuts.h"
#include <string.h>
#include <vendorcode/amd/agesa/f12/Proc/CPU/heapManager.h>
diff --git a/src/mainboard/amd/union_station/BiosCallOuts.c b/src/mainboard/amd/union_station/BiosCallOuts.c
index 272a3949a5..cd265ab192 100644
--- a/src/mainboard/amd/union_station/BiosCallOuts.c
+++ b/src/mainboard/amd/union_station/BiosCallOuts.c
@@ -22,6 +22,7 @@
#include "BiosCallOuts.h"
#include "heapManager.h"
#include "SB800.h"
+#include <southbridge/amd/cimx/sb800/gpio_oem.h>
#include <stdlib.h>
static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
diff --git a/src/mainboard/amd/union_station/BiosCallOuts.h b/src/mainboard/amd/union_station/BiosCallOuts.h
index 0c0d4aa4ad..9c4bef2de7 100644
--- a/src/mainboard/amd/union_station/BiosCallOuts.h
+++ b/src/mainboard/amd/union_station/BiosCallOuts.h
@@ -24,13 +24,5 @@
#include <northbridge/amd/agesa/family14/fam14_callouts.h>
-#define SB_GPIO_REG02 2
-#define SB_GPIO_REG09 9
-#define SB_GPIO_REG10 10
-#define SB_GPIO_REG15 15
-#define SB_GPIO_REG17 17
-#define SB_GPIO_REG21 21
-#define SB_GPIO_REG25 25
-#define SB_GPIO_REG28 28
#endif //_BIOS_CALLOUT_H_
diff --git a/src/mainboard/gizmosphere/gizmo/PlatformGnbPcie.c b/src/mainboard/gizmosphere/gizmo/PlatformGnbPcie.c
index 26bf10b566..cc4bbfbe96 100755
--- a/src/mainboard/gizmosphere/gizmo/PlatformGnbPcie.c
+++ b/src/mainboard/gizmosphere/gizmo/PlatformGnbPcie.c
@@ -24,7 +24,6 @@
#include "heapManager.h"
#include "PlatformGnbPcieComplex.h"
#include "Filecode.h"
-#include "BiosCallOuts.h"
#include <string.h>
diff --git a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c
index 347a7b76d5..ad4934e348 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c
@@ -19,7 +19,6 @@
*/
#include "PlatformGnbPcieComplex.h"
-#include "BiosCallOuts.h"
#include <string.h>
#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
diff --git a/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c b/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c
index 3104c24835..6c12e4715f 100644
--- a/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c
+++ b/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c
@@ -20,6 +20,8 @@
#include "AGESA.h"
#include "amdlib.h"
#include "BiosCallOuts.h"
+#include "SB800.h"
+#include <southbridge/amd/cimx/sb800/gpio_oem.h>
#include "heapManager.h"
#include <stdlib.h>
diff --git a/src/mainboard/lippert/frontrunner-af/BiosCallOuts.h b/src/mainboard/lippert/frontrunner-af/BiosCallOuts.h
index 4135040712..0ba428f29d 100644
--- a/src/mainboard/lippert/frontrunner-af/BiosCallOuts.h
+++ b/src/mainboard/lippert/frontrunner-af/BiosCallOuts.h
@@ -22,15 +22,5 @@
#include <northbridge/amd/agesa/def_callouts.h>
#include <northbridge/amd/agesa/family14/fam14_callouts.h>
-#include "SB800.h"
-
-
-/* FCH GPIO access helpers */
-#define FCH_IOMUX(gpio_nr) (*(u8*)(ACPI_MMIO_BASE+IOMUX_BASE+(gpio_nr)))
-#define FCH_GPIO(gpio_nr) (*(volatile u8*)(ACPI_MMIO_BASE+GPIO_BASE+(gpio_nr)))
-static inline u8 fch_gpio_state(unsigned int gpio_nr)
-{
- return FCH_GPIO(gpio_nr) >> 7;
-}
#endif //_BIOS_CALLOUT_H_
diff --git a/src/mainboard/lippert/frontrunner-af/PlatformGnbPcie.c b/src/mainboard/lippert/frontrunner-af/PlatformGnbPcie.c
index ccf262cab4..c06296ffc6 100644
--- a/src/mainboard/lippert/frontrunner-af/PlatformGnbPcie.c
+++ b/src/mainboard/lippert/frontrunner-af/PlatformGnbPcie.c
@@ -23,7 +23,6 @@
#include "heapManager.h"
#include "PlatformGnbPcieComplex.h"
#include "Filecode.h"
-#include "BiosCallOuts.h"
#include <string.h>
diff --git a/src/mainboard/lippert/frontrunner-af/mainboard.c b/src/mainboard/lippert/frontrunner-af/mainboard.c
index f8133583a3..fd7111b4db 100644
--- a/src/mainboard/lippert/frontrunner-af/mainboard.c
+++ b/src/mainboard/lippert/frontrunner-af/mainboard.c
@@ -31,6 +31,7 @@
#include <cpu/amd/mtrr.h>
#include "SBPLATFORM.h"
#include "OEM.h" /* SMBUS0_BASE_ADDRESS */
+#include <southbridge/amd/cimx/sb800/gpio_oem.h>
/* Init SIO GPIOs. */
#define SIO_RUNTIME_BASE 0x0E00
diff --git a/src/mainboard/lippert/toucan-af/BiosCallOuts.c b/src/mainboard/lippert/toucan-af/BiosCallOuts.c
index da9ab1a8fc..87a2ae02d2 100644
--- a/src/mainboard/lippert/toucan-af/BiosCallOuts.c
+++ b/src/mainboard/lippert/toucan-af/BiosCallOuts.c
@@ -20,6 +20,8 @@
#include "AGESA.h"
#include "amdlib.h"
#include "BiosCallOuts.h"
+#include "SB800.h"
+#include <southbridge/amd/cimx/sb800/gpio_oem.h>
#include "heapManager.h"
#include <stdlib.h>
diff --git a/src/mainboard/lippert/toucan-af/BiosCallOuts.h b/src/mainboard/lippert/toucan-af/BiosCallOuts.h
index c0463a8521..0ba428f29d 100644
--- a/src/mainboard/lippert/toucan-af/BiosCallOuts.h
+++ b/src/mainboard/lippert/toucan-af/BiosCallOuts.h
@@ -22,16 +22,5 @@
#include <northbridge/amd/agesa/def_callouts.h>
#include <northbridge/amd/agesa/family14/fam14_callouts.h>
-#include "SB800.h"
-
-
-/* FCH GPIO access helpers */
-#define FCH_IOMUX(gpio_nr) (*(u8*)(ACPI_MMIO_BASE+IOMUX_BASE+(gpio_nr)))
-#define FCH_PMIO(reg_nr) (*(u8*)(ACPI_MMIO_BASE+PMIO_BASE+(reg_nr)))
-#define FCH_GPIO(gpio_nr) (*(volatile u8*)(ACPI_MMIO_BASE+GPIO_BASE+(gpio_nr)))
-static inline u8 fch_gpio_state(unsigned int gpio_nr)
-{
- return FCH_GPIO(gpio_nr) >> 7;
-}
#endif //_BIOS_CALLOUT_H_
diff --git a/src/mainboard/lippert/toucan-af/PlatformGnbPcie.c b/src/mainboard/lippert/toucan-af/PlatformGnbPcie.c
index 0cdfcda7e8..f8ba912198 100644
--- a/src/mainboard/lippert/toucan-af/PlatformGnbPcie.c
+++ b/src/mainboard/lippert/toucan-af/PlatformGnbPcie.c
@@ -23,7 +23,6 @@
#include "heapManager.h"
#include "PlatformGnbPcieComplex.h"
#include "Filecode.h"
-#include "BiosCallOuts.h"
#include <string.h>
diff --git a/src/mainboard/lippert/toucan-af/mainboard.c b/src/mainboard/lippert/toucan-af/mainboard.c
index 660893079a..50b981bf5b 100644
--- a/src/mainboard/lippert/toucan-af/mainboard.c
+++ b/src/mainboard/lippert/toucan-af/mainboard.c
@@ -31,6 +31,7 @@
#include <cpu/amd/mtrr.h>
#include "SBPLATFORM.h"
#include "OEM.h" /* SMBUS0_BASE_ADDRESS */
+#include <southbridge/amd/cimx/sb800/gpio_oem.h>
/* Write data block to slave on SMBUS0. */
#define SMB0_STATUS ((SMBUS0_BASE_ADDRESS) + 0)
diff --git a/src/southbridge/amd/cimx/sb700/gpio_oem.h b/src/southbridge/amd/cimx/sb700/gpio_oem.h
new file mode 100644
index 0000000000..bc05e2a5b9
--- /dev/null
+++ b/src/southbridge/amd/cimx/sb700/gpio_oem.h
@@ -0,0 +1,11 @@
+#ifndef _CIMX_SB_GPIO_OEM_H_
+#define _CIMX_SB_GPIO_OEM_H_
+
+#define SB_GPIO_REG01 1
+#define SB_GPIO_REG02 2
+#define SB_GPIO_REG15 15
+#define SB_GPIO_REG24 24
+#define SB_GPIO_REG25 25
+#define SB_GPIO_REG27 27
+
+#endif
diff --git a/src/southbridge/amd/cimx/sb800/gpio_oem.h b/src/southbridge/amd/cimx/sb800/gpio_oem.h
new file mode 100644
index 0000000000..a9f59e3a31
--- /dev/null
+++ b/src/southbridge/amd/cimx/sb800/gpio_oem.h
@@ -0,0 +1,23 @@
+#ifndef _CIMX_SB_GPIO_OEM_H_
+#define _CIMX_SB_GPIO_OEM_H_
+
+#define SB_GPIO_REG02 2
+#define SB_GPIO_REG09 9
+#define SB_GPIO_REG10 10
+#define SB_GPIO_REG15 15
+#define SB_GPIO_REG17 17
+#define SB_GPIO_REG21 21
+#define SB_GPIO_REG25 25
+#define SB_GPIO_REG28 28
+
+/* FCH GPIO access helpers */
+#define FCH_IOMUX(gpio_nr) (*(u8*)(ACPI_MMIO_BASE+IOMUX_BASE+(gpio_nr)))
+#define FCH_PMIO(reg_nr) (*(u8*)(ACPI_MMIO_BASE+PMIO_BASE+(reg_nr)))
+#define FCH_GPIO(gpio_nr) (*(volatile u8*)(ACPI_MMIO_BASE+GPIO_BASE+(gpio_nr)))
+
+static inline u8 fch_gpio_state(unsigned int gpio_nr)
+{
+ return FCH_GPIO(gpio_nr) >> 7;
+}
+
+#endif