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-rw-r--r--src/northbridge/intel/fsp_rangeley/port_access.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/northbridge/intel/fsp_rangeley/port_access.c b/src/northbridge/intel/fsp_rangeley/port_access.c
index c4730a9331..418cafc281 100644
--- a/src/northbridge/intel/fsp_rangeley/port_access.c
+++ b/src/northbridge/intel/fsp_rangeley/port_access.c
@@ -14,9 +14,7 @@
* GNU General Public License for more details.
*/
-#ifndef __PRE_RAM__
-#define __PRE_RAM__ // Use simple device model for this file even in ramstage
-#endif
+#define __SIMPLE_DEVICE__
#include <stdint.h>
#include <arch/io.h>