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-rw-r--r--src/Kconfig3
-rw-r--r--src/cpu/intel/haswell/Kconfig3
-rw-r--r--src/northbridge/amd/agesa/Kconfig1
-rw-r--r--src/northbridge/amd/pi/Kconfig1
-rw-r--r--src/northbridge/intel/e7505/Kconfig1
-rw-r--r--src/northbridge/intel/gm45/Kconfig1
-rw-r--r--src/northbridge/intel/haswell/Kconfig1
-rw-r--r--src/northbridge/intel/i945/Kconfig1
-rw-r--r--src/northbridge/intel/nehalem/Kconfig1
-rw-r--r--src/northbridge/intel/pineview/Kconfig1
-rw-r--r--src/northbridge/intel/sandybridge/Kconfig2
-rw-r--r--src/northbridge/intel/x4x/Kconfig1
-rw-r--r--src/soc/amd/stoneyridge/Kconfig2
-rw-r--r--src/soc/intel/apollolake/Kconfig3
-rw-r--r--src/soc/intel/baytrail/Kconfig3
-rw-r--r--src/soc/intel/braswell/Kconfig5
-rw-r--r--src/soc/intel/broadwell/Kconfig5
-rw-r--r--src/soc/intel/cannonlake/Kconfig4
-rw-r--r--src/soc/intel/denverton_ns/Kconfig1
-rw-r--r--src/soc/intel/quark/Kconfig1
-rw-r--r--src/soc/intel/skylake/Kconfig4
21 files changed, 7 insertions, 38 deletions
diff --git a/src/Kconfig b/src/Kconfig
index ac8668dbd8..4465a6b0dc 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -233,8 +233,9 @@ config NO_RELOCATABLE_RAMSTAGE
default y
config RELOCATABLE_RAMSTAGE
+ bool
depends on EARLY_CBMEM_INIT
- bool "Build the ramstage to be relocatable in 32-bit address space."
+ default !NO_RELOCATABLE_RAMSTAGE
select RELOCATABLE_MODULES
help
The reloctable ramstage support allows for the ramstage to be built
diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig
index 9076b88015..423966c2d4 100644
--- a/src/cpu/intel/haswell/Kconfig
+++ b/src/cpu/intel/haswell/Kconfig
@@ -18,8 +18,6 @@ config CPU_SPECIFIC_OPTIONS
select UDELAY_TSC
select TSC_CONSTANT_RATE
select SMM_TSEG
- select RELOCATABLE_MODULES
- select RELOCATABLE_RAMSTAGE
select SUPPORT_CPU_UCODE_IN_CBFS
#select AP_IN_SIPI_WAIT
select TSC_SYNC_MFENCE
@@ -46,7 +44,6 @@ config SMM_RESERVED_SIZE
config RESET_ON_INVALID_RAMSTAGE_CACHE
bool "Reset the system on S3 wake when ramstage cache invalid."
default n
- depends on RELOCATABLE_RAMSTAGE
help
The haswell romstage code caches the loaded ramstage program
in SMM space. On S3 wake the romstage will copy over a fresh
diff --git a/src/northbridge/amd/agesa/Kconfig b/src/northbridge/amd/agesa/Kconfig
index b7408d2595..4bf1d472b8 100644
--- a/src/northbridge/amd/agesa/Kconfig
+++ b/src/northbridge/amd/agesa/Kconfig
@@ -16,7 +16,6 @@
config NORTHBRIDGE_AMD_AGESA
bool
default CPU_AMD_AGESA
- select RELOCATABLE_RAMSTAGE if EARLY_CBMEM_INIT
select CBMEM_TOP_BACKUP
if NORTHBRIDGE_AMD_AGESA
diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig
index ea703d5a76..7da2ae9e64 100644
--- a/src/northbridge/amd/pi/Kconfig
+++ b/src/northbridge/amd/pi/Kconfig
@@ -18,7 +18,6 @@ config NORTHBRIDGE_AMD_PI
default y if CPU_AMD_PI
default n
select CBMEM_TOP_BACKUP
- select RELOCATABLE_RAMSTAGE
if NORTHBRIDGE_AMD_PI
diff --git a/src/northbridge/intel/e7505/Kconfig b/src/northbridge/intel/e7505/Kconfig
index 29613a92f4..7f905f26a6 100644
--- a/src/northbridge/intel/e7505/Kconfig
+++ b/src/northbridge/intel/e7505/Kconfig
@@ -22,7 +22,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
def_bool y
select NO_MMCONF_SUPPORT
select HAVE_DEBUG_RAM_SETUP
- select RELOCATABLE_RAMSTAGE
select POSTCAR_STAGE
config HW_SCRUBBER
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
index 193ec70ecb..a45e84129c 100644
--- a/src/northbridge/intel/gm45/Kconfig
+++ b/src/northbridge/intel/gm45/Kconfig
@@ -26,7 +26,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select INTEL_EDID
select INTEL_GMA_ACPI
select INTEL_GMA_SSC_ALTERNATE_REF
- select RELOCATABLE_RAMSTAGE
select HAVE_LINEAR_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
select POSTCAR_STAGE
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index 5e6956edf0..ae6d81285d 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -19,7 +19,6 @@ config NORTHBRIDGE_INTEL_HASWELL
select CACHE_MRC_SETTINGS
select INTEL_DDI
select INTEL_GMA_ACPI
- select RELOCATABLE_RAMSTAGE
select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
select POSTCAR_STAGE
select POSTCAR_CONSOLE
diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig
index e04d0c3336..549f4dfd59 100644
--- a/src/northbridge/intel/i945/Kconfig
+++ b/src/northbridge/intel/i945/Kconfig
@@ -25,7 +25,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select VGA
select INTEL_GMA_ACPI
select INTEL_GMA_SSC_ALTERNATE_REF
- select RELOCATABLE_RAMSTAGE
select INTEL_EDID
select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
select POSTCAR_STAGE
diff --git a/src/northbridge/intel/nehalem/Kconfig b/src/northbridge/intel/nehalem/Kconfig
index 4689c1a096..26d0a7d159 100644
--- a/src/northbridge/intel/nehalem/Kconfig
+++ b/src/northbridge/intel/nehalem/Kconfig
@@ -20,7 +20,6 @@ config NORTHBRIDGE_INTEL_NEHALEM
select INTEL_EDID
select TSC_MONOTONIC_TIMER
select INTEL_GMA_ACPI
- select RELOCATABLE_RAMSTAGE
select CACHE_MRC_SETTINGS
select HAVE_LINEAR_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig
index 80f566acb6..221fa384b4 100644
--- a/src/northbridge/intel/pineview/Kconfig
+++ b/src/northbridge/intel/pineview/Kconfig
@@ -27,7 +27,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select MAINBOARD_HAS_NATIVE_VGA_INIT
select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
select INTEL_EDID if MAINBOARD_DO_NATIVE_VGA_INIT
- select RELOCATABLE_RAMSTAGE
select INTEL_GMA_ACPI
select POSTCAR_STAGE
select POSTCAR_CONSOLE
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
index f727453afe..5023319ebb 100644
--- a/src/northbridge/intel/sandybridge/Kconfig
+++ b/src/northbridge/intel/sandybridge/Kconfig
@@ -20,7 +20,6 @@ config NORTHBRIDGE_INTEL_SANDYBRIDGE
select CPU_INTEL_MODEL_206AX
select HAVE_DEBUG_RAM_SETUP
select INTEL_GMA_ACPI
- select RELOCATABLE_RAMSTAGE
select POSTCAR_STAGE
select POSTCAR_CONSOLE
@@ -30,7 +29,6 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE
select CPU_INTEL_MODEL_306AX
select HAVE_DEBUG_RAM_SETUP
select INTEL_GMA_ACPI
- select RELOCATABLE_RAMSTAGE
select POSTCAR_STAGE
select POSTCAR_CONSOLE
diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
index 610f7856ea..6e3a19c277 100644
--- a/src/northbridge/intel/x4x/Kconfig
+++ b/src/northbridge/intel/x4x/Kconfig
@@ -25,7 +25,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select LAPIC_MONOTONIC_TIMER
select VGA
select INTEL_GMA_ACPI
- select RELOCATABLE_RAMSTAGE
select HAVE_LINEAR_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
select CACHE_MRC_SETTINGS
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 1af3ccbfde..f2aa9ed106 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -56,13 +56,11 @@ config CPU_SPECIFIC_OPTIONS
select BOOTBLOCK_CONSOLE
select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
- select RELOCATABLE_MODULES
select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
select PARALLEL_MP
select PARALLEL_MP_AP_WORK
select HAVE_SMI_HANDLER
select SMM_TSEG
- select RELOCATABLE_RAMSTAGE
select POSTCAR_STAGE
select POSTCAR_CONSOLE
select SSE
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 42ff3bdf39..830b32be45 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -40,7 +40,7 @@ config CPU_SPECIFIC_OPTIONS
# Misc options
select C_ENVIRONMENT_BOOTBLOCK
select CACHE_MRC_SETTINGS
- select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE
+ select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
select COLLECT_TIMESTAMPS
select COMMON_FADT
select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS
@@ -62,7 +62,6 @@ config CPU_SPECIFIC_OPTIONS
select POSTCAR_STAGE
select PMC_INVALID_READ_AFTER_WRITE
select REG_SCRIPT
- select RELOCATABLE_RAMSTAGE # Build fails if this is not selected
select RTC
select SMM_TSEG
select SA_ENABLE_IMR
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 03b949c250..1f7e21e1d9 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -19,8 +19,6 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_SMI_HANDLER
select HAVE_HARD_RESET
select NO_FIXED_XIP_ROM_SIZE
- select RELOCATABLE_MODULES
- select RELOCATABLE_RAMSTAGE
select PARALLEL_MP
select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK
@@ -137,7 +135,6 @@ config DCACHE_RAM_MRC_VAR_SIZE
config RESET_ON_INVALID_RAMSTAGE_CACHE
bool "Reset the system on S3 wake when ramstage cache invalid."
default n
- depends on RELOCATABLE_RAMSTAGE
help
The baytrail romstage code caches the loaded ramstage program
in SMM space. On S3 wake the romstage will copy over a fresh
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index 1154c041d1..23e5990d54 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -14,7 +14,7 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_VERSTAGE_X86_32
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
- select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE
+ select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
select COLLECT_TIMESTAMPS
select SUPPORT_CPU_UCODE_IN_CBFS
select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
@@ -22,8 +22,6 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_SMI_HANDLER
select HAVE_HARD_RESET
select NO_FIXED_XIP_ROM_SIZE
- select RELOCATABLE_MODULES
- select RELOCATABLE_RAMSTAGE
select PARALLEL_MP
select PCIEXP_ASPM
select PCIEXP_CLK_PM
@@ -106,7 +104,6 @@ config DCACHE_RAM_SIZE
config RESET_ON_INVALID_RAMSTAGE_CACHE
bool "Reset the system on S3 wake when ramstage cache invalid."
default n
- depends on RELOCATABLE_RAMSTAGE
help
The haswell romstage code caches the loaded ramstage program
in SMM space. On S3 wake the romstage will copy over a fresh
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig
index 5d8d602121..1b1085a4ac 100644
--- a/src/soc/intel/broadwell/Kconfig
+++ b/src/soc/intel/broadwell/Kconfig
@@ -15,7 +15,7 @@ config CPU_SPECIFIC_OPTIONS
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
select MRC_SETTINGS_PROTECT
- select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE
+ select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select SUPPORT_CPU_UCODE_IN_CBFS
select HAVE_MONOTONIC_TIMER
@@ -23,8 +23,6 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_HARD_RESET
select HAVE_USBDEBUG
select IOAPIC
- select RELOCATABLE_MODULES
- select RELOCATABLE_RAMSTAGE
select REG_SCRIPT
select PARALLEL_MP
select RTC
@@ -159,7 +157,6 @@ config PRE_GRAPHICS_DELAY
config RESET_ON_INVALID_RAMSTAGE_CACHE
bool "Reset the system on S3 wake when ramstage cache invalid."
default n
- depends on RELOCATABLE_RAMSTAGE
help
The romstage code caches the loaded ramstage program in SMM space.
On S3 wake the romstage will copy over a fresh ramstage that was
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 5d8883bc9c..dd369365f9 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -17,7 +17,7 @@ config CPU_SPECIFIC_OPTIONS
select BOOT_DEVICE_SUPPORTS_WRITES
select C_ENVIRONMENT_BOOTBLOCK
select CACHE_MRC_SETTINGS
- select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE
+ select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
select COMMON_FADT
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select GENERIC_GPIO_LIB
@@ -37,8 +37,6 @@ config CPU_SPECIFIC_OPTIONS
select POSTCAR_CONSOLE
select POSTCAR_STAGE
select REG_SCRIPT
- select RELOCATABLE_MODULES
- select RELOCATABLE_RAMSTAGE
select SMM_TSEG
select SMP
select SOC_AHCI_PORT_IMPLEMENTED_INVERT
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index 35296d553d..6c366f1998 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -40,7 +40,6 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_SMI_HANDLER
select SMM_TSEG
select CACHE_MRC_SETTINGS
- select RELOCATABLE_RAMSTAGE # Build fails if this is not selected
select PARALLEL_MP
select PCR_COMMON_IOSF_1_0
select SMP
diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig
index d1950a378a..30bb6a2740 100644
--- a/src/soc/intel/quark/Kconfig
+++ b/src/soc/intel/quark/Kconfig
@@ -32,7 +32,6 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_MONOTONIC_TIMER
select NO_MMCONF_SUPPORT
select REG_SCRIPT
- select RELOCATABLE_RAMSTAGE
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_RESET
select SOC_SETS_MSRS
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 13b18dc151..b3e9d9407e 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -24,7 +24,7 @@ config CPU_SPECIFIC_OPTIONS
select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
- select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE
+ select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
select COLLECT_TIMESTAMPS
select COMMON_FADT
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
@@ -47,8 +47,6 @@ config CPU_SPECIFIC_OPTIONS
select PCIEXP_L1_SUB_STATE
select PCIEX_LENGTH_64MB
select REG_SCRIPT
- select RELOCATABLE_MODULES
- select RELOCATABLE_RAMSTAGE
select RTC
select SA_ENABLE_DPR
select SMM_TSEG