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-rw-r--r--src/mainboard/google/dedede/dsdt.asl1
-rw-r--r--src/mainboard/google/volteer/dsdt.asl1
-rw-r--r--src/mainboard/intel/jasperlake_rvp/dsdt.asl1
-rw-r--r--src/mainboard/intel/tglrvp/dsdt.asl1
4 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/google/dedede/dsdt.asl b/src/mainboard/google/dedede/dsdt.asl
index 4134b036da..45a1486b55 100644
--- a/src/mainboard/google/dedede/dsdt.asl
+++ b/src/mainboard/google/dedede/dsdt.asl
@@ -38,7 +38,6 @@ DefinitionBlock(
/* Chrome OS specific */
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */
diff --git a/src/mainboard/google/volteer/dsdt.asl b/src/mainboard/google/volteer/dsdt.asl
index e4bbe90d70..f62780bccc 100644
--- a/src/mainboard/google/volteer/dsdt.asl
+++ b/src/mainboard/google/volteer/dsdt.asl
@@ -47,6 +47,5 @@ DefinitionBlock(
#include <ec/google/chromeec/acpi/ec.asl>
}
- // Chipset specific sleep states
#include <southbridge/intel/common/acpi/sleepstates.asl>
}
diff --git a/src/mainboard/intel/jasperlake_rvp/dsdt.asl b/src/mainboard/intel/jasperlake_rvp/dsdt.asl
index 8788a1f71d..4b9a696214 100644
--- a/src/mainboard/intel/jasperlake_rvp/dsdt.asl
+++ b/src/mainboard/intel/jasperlake_rvp/dsdt.asl
@@ -58,7 +58,6 @@ DefinitionBlock(
}
#endif
- /* Chipset specific sleep states */
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Mainboard specific */
diff --git a/src/mainboard/intel/tglrvp/dsdt.asl b/src/mainboard/intel/tglrvp/dsdt.asl
index a17f597e6b..8236ccb110 100644
--- a/src/mainboard/intel/tglrvp/dsdt.asl
+++ b/src/mainboard/intel/tglrvp/dsdt.asl
@@ -58,7 +58,6 @@ DefinitionBlock(
}
#endif
- /* Chipset specific sleep states */
#include <southbridge/intel/common/acpi/sleepstates.asl>
/* Mainboard specific */