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-rw-r--r--src/soc/amd/picasso/acpi/sb_pci0_fch.asl1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/acpi/sb_pci0_fch.asl b/src/soc/amd/picasso/acpi/sb_pci0_fch.asl
index f627a28039..cbb1b91782 100644
--- a/src/soc/amd/picasso/acpi/sb_pci0_fch.asl
+++ b/src/soc/amd/picasso/acpi/sb_pci0_fch.asl
@@ -22,6 +22,7 @@ Method(_OSC,4)
/* 0:14.3 - LPC */
#include <soc/amd/common/acpi/lpc.asl>
+#include <soc/amd/common/acpi/platform.asl>
Name(CRES, ResourceTemplate() {
/* Set the Bus number and Secondary Bus number for the PCI0 device