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-rw-r--r--src/soc/nvidia/tegra132/Kconfig20
-rw-r--r--src/soc/nvidia/tegra132/Makefile.inc1
-rw-r--r--src/soc/nvidia/tegra132/bootblock_asm.S41
-rw-r--r--src/soc/nvidia/tegra132/romstage.c3
-rw-r--r--src/soc/nvidia/tegra132/romstage_asm.S39
-rw-r--r--src/soc/nvidia/tegra132/stack.S47
6 files changed, 112 insertions, 39 deletions
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig
index a8b9bdc139..761685abc9 100644
--- a/src/soc/nvidia/tegra132/Kconfig
+++ b/src/soc/nvidia/tegra132/Kconfig
@@ -51,14 +51,30 @@ config RAMSTAGE_BASE
hex
default 0x80200000
-config STACK_TOP
+config BOOTBLOCK_STACK_TOP
hex
default 0x40020000
-config STACK_BOTTOM
+config BOOTBLOCK_STACK_BOTTOM
hex
default 0x4001c000
+config ROMSTAGE_STACK_TOP
+ hex
+ default 0x40020000
+
+config ROMSTAGE_STACK_BOTTOM
+ hex
+ default 0x4001c000
+
+config RAMSTAGE_STACK_TOP
+ hex
+ default 0x80020000
+
+config RAMSTAGE_STACK_BOTTOM
+ hex
+ default 0x8001c000
+
config CBFS_CACHE_ADDRESS
hex "memory address to put CBFS cache data"
default 0x40006000
diff --git a/src/soc/nvidia/tegra132/Makefile.inc b/src/soc/nvidia/tegra132/Makefile.inc
index c14f1c8530..8c085a945a 100644
--- a/src/soc/nvidia/tegra132/Makefile.inc
+++ b/src/soc/nvidia/tegra132/Makefile.inc
@@ -16,6 +16,7 @@ ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
bootblock-$(CONFIG_DRIVERS_UART) += uart.c
endif
+romstage-y += romstage_asm.S
romstage-y += cbfs.c
romstage-y += cbmem.c
romstage-y += timer.c
diff --git a/src/soc/nvidia/tegra132/bootblock_asm.S b/src/soc/nvidia/tegra132/bootblock_asm.S
index ebd64a7425..1b2fbb7709 100644
--- a/src/soc/nvidia/tegra132/bootblock_asm.S
+++ b/src/soc/nvidia/tegra132/bootblock_asm.S
@@ -31,6 +31,8 @@
#include <arch/asm.h>
+#include "stack.S"
+
ENTRY(_start)
/*
* Set the cpu to System mode with IRQ and FIQ disabled. Prefetch/Data
@@ -40,40 +42,7 @@ ENTRY(_start)
*/
msr cpsr_cxf, #0xdf
- /*
- * Initialize the stack to a known value. This is used to check for
- * stack overflow later in the boot process.
- */
- ldr r0, .Stack
- ldr r1, .Stack_size
- sub r0, r0, r1
- ldr r1, .Stack
- ldr r2, =0xdeadbeef
-init_stack_loop:
- str r2, [r0]
- add r0, #4
- cmp r0, r1
- bne init_stack_loop
-
-/* Set stackpointer in internal RAM to call bootblock main() */
-call_bootblock:
- ldr sp, .Stack /* Set up stack pointer */
- ldr r0,=0x00000000
- /*
- * The current design of cpu_info places the
- * struct at the top of the stack. The number of
- * words pushed must be at least as large as that
- * struct.
- */
- push {r0-r2}
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
- /*
- * Use "bl" instead of "b" even though we do not intend to return.
- * "bl" gets compiled to "blx" if we're transitioning from ARM to
- * Thumb. However, "b" will not and GCC may attempt to create a
- * wrapper which is currently broken.
- */
- bl main
+ stack_init stack=.Stack size=.Stack_size seed=1 func=main
ENDPROC(_start)
/* we do it this way because it's a 32-bit constant and
@@ -82,8 +51,8 @@ ENDPROC(_start)
*/
.align 2
.Stack:
- .word CONFIG_STACK_TOP
+ .word CONFIG_BOOTBLOCK_STACK_TOP
.align 2
/* create this size the same way we do in ramstage.ld: top-bottom */
.Stack_size:
- .word CONFIG_STACK_TOP - CONFIG_STACK_BOTTOM
+ .word CONFIG_BOOTBLOCK_STACK_TOP - CONFIG_BOOTBLOCK_STACK_BOTTOM
diff --git a/src/soc/nvidia/tegra132/romstage.c b/src/soc/nvidia/tegra132/romstage.c
index 3bc2231131..6d51403d04 100644
--- a/src/soc/nvidia/tegra132/romstage.c
+++ b/src/soc/nvidia/tegra132/romstage.c
@@ -26,7 +26,8 @@
#include "sdram.h"
#include "ccplex.h"
-void main(void)
+void romstage(void);
+void romstage(void)
{
void *entry;
diff --git a/src/soc/nvidia/tegra132/romstage_asm.S b/src/soc/nvidia/tegra132/romstage_asm.S
new file mode 100644
index 0000000000..ac3c93ebc1
--- /dev/null
+++ b/src/soc/nvidia/tegra132/romstage_asm.S
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/asm.h>
+#include "stack.S"
+
+ .section ".text", "ax", %progbits
+
+ENTRY(main)
+ stack_init stack=.Stack size=.Stack_size seed=0 func=romstage
+ENDPROC(main)
+
+/* we do it this way because it's a 32-bit constant and
+ * in some cases too far away to be loaded as just an offset
+ * from IP
+ */
+.align 2
+.Stack:
+ .word CONFIG_ROMSTAGE_STACK_TOP
+.align 2
+.Stack_size:
+ .word CONFIG_ROMSTAGE_STACK_TOP - CONFIG_ROMSTAGE_STACK_BOTTOM
+
diff --git a/src/soc/nvidia/tegra132/stack.S b/src/soc/nvidia/tegra132/stack.S
new file mode 100644
index 0000000000..6d3cd4e446
--- /dev/null
+++ b/src/soc/nvidia/tegra132/stack.S
@@ -0,0 +1,47 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/* Macro to initialize stack, perform seeding if required and finally call the
+ * function provided
+ * @stack : Stack address
+ * @size : Stack size
+ * @seed : Stack seeding required (1=yes/otherwise=no)
+ * @func : Function to call after initializing stack
+ */
+.macro stack_init stack, size, seed, func
+ /* Check if stack seeding is required */
+ mov r0, #\seed
+ cmp r0, #1
+ bne call_func
+ /* Stack seeding */
+ ldr r0, \stack
+ ldr r1, \size
+ sub r0, r0, r1
+ ldr r1, \stack
+ ldr r2, =0xdeadbeef
+init_stack_loop:
+ str r2, [r0]
+ add r0, #4
+ cmp r0, r1
+ bne init_stack_loop
+
+call_func:
+ ldr sp, \stack /* Set up stack pointer */
+ bl \func
+.endm