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-rw-r--r--src/mainboard/google/reef/acpi/ec.asl23
-rw-r--r--src/mainboard/google/reef/acpi/mainboard.asl42
-rw-r--r--src/mainboard/google/reef/dsdt.asl44
-rw-r--r--src/mainboard/google/reef/variants/baseboard/include/baseboard/acpi/dptf.asl (renamed from src/mainboard/google/reef/acpi/dptf.asl)5
-rw-r--r--src/mainboard/google/reef/variants/baseboard/include/baseboard/ec.h14
-rw-r--r--src/mainboard/google/reef/variants/reef/include/variant/acpi/dptf.asl (renamed from src/mainboard/google/reef/acpi/superio.asl)7
6 files changed, 54 insertions, 81 deletions
diff --git a/src/mainboard/google/reef/acpi/ec.asl b/src/mainboard/google/reef/acpi/ec.asl
deleted file mode 100644
index b70c070ce2..0000000000
--- a/src/mainboard/google/reef/acpi/ec.asl
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* Enable EC backed ALS device in ACPI */
-#define EC_ENABLE_ALS_DEVICE
-
-/* Enable EC backed PD MCU device in ACPI */
-#define EC_ENABLE_PD_MCU_DEVICE
-
-/* ACPI code for EC functions */
-#include <ec/google/chromeec/acpi/ec.asl>
diff --git a/src/mainboard/google/reef/acpi/mainboard.asl b/src/mainboard/google/reef/acpi/mainboard.asl
deleted file mode 100644
index 0b2fdc8a32..0000000000
--- a/src/mainboard/google/reef/acpi/mainboard.asl
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2016 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <variant/ec.h>
-#include <variant/gpio.h>
-
-Scope (\_SB)
-{
- Device (LID0)
- {
- Name (_HID, EisaId ("PNP0C0D"))
- Method (_LID, 0)
- {
- Return (\_SB.PCI0.LPCB.EC0.LIDS)
- }
- Name (_PRW, Package () { GPE_EC_WAKE, 0x3 })
- }
-
- Device (PWRB)
- {
- Name (_HID, EisaId ("PNP0C0C"))
- }
-}
-
-Scope (\_SB.PCI0.LPCB)
-{
- /* Chrome OS Embedded Controller */
- #include "superio.asl"
- #include "ec.asl"
-}
diff --git a/src/mainboard/google/reef/dsdt.asl b/src/mainboard/google/reef/dsdt.asl
index 05876c05f1..3265941071 100644
--- a/src/mainboard/google/reef/dsdt.asl
+++ b/src/mainboard/google/reef/dsdt.asl
@@ -13,6 +13,9 @@
* GNU General Public License for more details.
*/
+#include <variant/ec.h>
+#include <variant/gpio.h>
+
DefinitionBlock(
"dsdt.aml",
"DSDT",
@@ -43,11 +46,42 @@ DefinitionBlock(
/* Chipset specific sleep states */
#include <soc/intel/apollolake/acpi/sleepstates.asl>
- /* Mainboard Specific devices */
- #include "acpi/mainboard.asl"
+ /* LID and Power button. */
+ Scope (\_SB)
+ {
+ Device (LID0)
+ {
+ Name (_HID, EisaId ("PNP0C0D"))
+ Method (_LID, 0)
+ {
+ Return (\_SB.PCI0.LPCB.EC0.LIDS)
+ }
+ Name (_PRW, Package () { GPE_EC_WAKE, 0x3 })
+ }
- Scope (\_SB) {
- /* Dynamic Platform Thermal Framework */
- #include "acpi/dptf.asl"
+ Device (PWRB)
+ {
+ Name (_HID, EisaId ("PNP0C0C"))
+ }
+ }
+
+ /* Chrome OS Embedded Controller */
+ Scope (\_SB.PCI0.LPCB)
+ {
+ /* ACPI code for EC SuperIO functions */
+ #include <ec/google/chromeec/acpi/superio.asl>
+ /* ACPI code for EC functions */
+ #include <ec/google/chromeec/acpi/ec.asl>
+ }
+
+ /* Dynamic Platform Thermal Framework */
+ Scope (\_SB)
+ {
+ /* Per board variant specific definitions. */
+ #include <variant/acpi/dptf.asl>
+ /* Include soc specific DPTF changes */
+ #include <soc/intel/apollolake/acpi/dptf.asl>
+ /* Include common dptf ASL files */
+ #include <soc/intel/common/acpi/dptf/dptf.asl>
}
}
diff --git a/src/mainboard/google/reef/acpi/dptf.asl b/src/mainboard/google/reef/variants/baseboard/include/baseboard/acpi/dptf.asl
index 1f9bfb2f8b..8c186870a8 100644
--- a/src/mainboard/google/reef/acpi/dptf.asl
+++ b/src/mainboard/google/reef/variants/baseboard/include/baseboard/acpi/dptf.asl
@@ -87,8 +87,3 @@ Name (MPPC, Package ()
1000 /* StepSize */
}
})
-
-/* Include soc specific DPTF changes */
-#include <soc/intel/apollolake/acpi/dptf.asl>
-/* Include common dptf ASL files */
-#include <soc/intel/common/acpi/dptf/dptf.asl>
diff --git a/src/mainboard/google/reef/variants/baseboard/include/baseboard/ec.h b/src/mainboard/google/reef/variants/baseboard/include/baseboard/ec.h
index 542f33a457..f2be328aa0 100644
--- a/src/mainboard/google/reef/variants/baseboard/include/baseboard/ec.h
+++ b/src/mainboard/google/reef/variants/baseboard/include/baseboard/ec.h
@@ -54,4 +54,18 @@
EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_SHUTDOWN)|\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_PANIC))
+/*
+ * ACPI related definitions for ASL code.
+ */
+
+/* Enable EC backed ALS device in ACPI */
+#define EC_ENABLE_ALS_DEVICE
+
+/* Enable EC backed PD MCU device in ACPI */
+#define EC_ENABLE_PD_MCU_DEVICE
+
+#define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */
+#define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */
+#define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */
+
#endif
diff --git a/src/mainboard/google/reef/acpi/superio.asl b/src/mainboard/google/reef/variants/reef/include/variant/acpi/dptf.asl
index 555e2a24a6..f3ff04b5e9 100644
--- a/src/mainboard/google/reef/acpi/superio.asl
+++ b/src/mainboard/google/reef/variants/reef/include/variant/acpi/dptf.asl
@@ -13,9 +13,4 @@
* GNU General Public License for more details.
*/
-#define SIO_EC_MEMMAP_ENABLE // EC Memory Map Resources
-#define SIO_EC_HOST_ENABLE // EC Host Interface Resources
-#define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard
-
-/* ACPI code for EC SuperIO functions */
-#include <ec/google/chromeec/acpi/superio.asl>
+#include <baseboard/acpi/dptf.asl>