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-rw-r--r--src/superio/NSC/pc87417/Config.lb2
-rw-r--r--src/superio/NSC/pc87417/chip.h16
-rw-r--r--src/superio/NSC/pc87417/pc87417.h92
-rw-r--r--src/superio/NSC/pc87417/pc87417_early_init.c31
-rw-r--r--src/superio/NSC/pc87417/superio.c77
5 files changed, 218 insertions, 0 deletions
diff --git a/src/superio/NSC/pc87417/Config.lb b/src/superio/NSC/pc87417/Config.lb
new file mode 100644
index 0000000000..f62a567d61
--- /dev/null
+++ b/src/superio/NSC/pc87417/Config.lb
@@ -0,0 +1,2 @@
+config chip.h
+object superio.o
diff --git a/src/superio/NSC/pc87417/chip.h b/src/superio/NSC/pc87417/chip.h
new file mode 100644
index 0000000000..65cc051353
--- /dev/null
+++ b/src/superio/NSC/pc87417/chip.h
@@ -0,0 +1,16 @@
+#ifndef SIO_COM1
+#define SIO_COM1_BASE 0x3F8
+#endif
+#ifndef SIO_COM2
+#define SIO_COM2_BASE 0x2F8
+#endif
+
+extern struct chip_operations superio_NSC_pc87417_ops;
+
+#include <pc80/keyboard.h>
+#include <uart8250.h>
+
+struct superio_NSC_pc87417_config {
+ struct uart8250 com1, com2;
+ struct pc_keyboard keyboard;
+};
diff --git a/src/superio/NSC/pc87417/pc87417.h b/src/superio/NSC/pc87417/pc87417.h
new file mode 100644
index 0000000000..7d5cad9545
--- /dev/null
+++ b/src/superio/NSC/pc87417/pc87417.h
@@ -0,0 +1,92 @@
+#define PC87417_FDC 0x00 /* Floppy */
+#define PC87417_PP 0x01 /* Parallel Port */
+#define PC87417_SP2 0x02 /* Com2 */
+#define PC87417_SP1 0x03 /* Com1 */
+#define PC87417_SWC 0x04 /* System Wake-Up Controller (SWC) */
+#define PC87417_KBCM 0x05 /* Mouse */
+#define PC87417_KBCK 0x06 /* Keyboard */
+#define PC87417_GPIO 0x07
+#define PC87417_XBUS 0x0F
+#define PC87417_RTC 0x10
+
+#define PC87417_GPIO_DEV PNP_DEV(0x2e, PC87417_GPIO)
+/* This is to get around a romcc bug */
+//#define PC87417_XBUS_DEV PNP_DEV(0x2e, PC87417_XBUS)
+#define PC87417_XBUS_DEV PNP_DEV(0x2e, 0x0f)
+
+#define PC87417_GPSEL 0xf0
+#define PC87417_GPCFG1 0xf1
+#define PC87417_GPEVR 0xf2
+#define PC87417_GPCFG2 0xf3
+#define PC87417_EXTCFG 0xf4
+#define PC87417_IOEXT1A 0xf5
+#define PC87417_IOEXT1B 0xf6
+#define PC87417_IOEXT2A 0xf7
+#define PC87417_IOEXT2B 0xf8
+
+#define PC87417_GPDO_0 0x00
+#define PC87417_GPDI_0 0x01
+#define PC87417_GPDO_1 0x02
+#define PC87417_GPDI_1 0x03
+#define PC87417_GPEVEN_1 0x04
+#define PC87417_GPEVST_1 0x05
+#define PC87417_GPDO_2 0x06
+#define PC87417_GPDI_2 0x07
+#define PC87417_GPDO_3 0x08
+#define PC87417_GPDI_3 0x09
+#define PC87417_GPDO_4 0x0a
+#define PC87417_GPDI_4 0x0b
+#define PC87417_GPEVEN_4 0x0c
+#define PC87417_GPEVST_4 0x0d
+#define PC87417_GPDO_5 0x0e
+#define PC87417_GPDI_5 0x0f
+#define PC87417_GPDO_6 0x10
+#define PC87417_GPDO_7A 0x11
+#define PC87417_GPDO_7B 0x12
+#define PC87417_GPDO_7C 0x13
+#define PC87417_GPDO_7D 0x14
+#define PC87417_GPDI_7A 0x15
+#define PC87417_GPDI_7B 0x16
+#define PC87417_GPDI_7C 0x17
+#define PC87417_GPDI_7D 0x18
+
+#define PC87417_XIOCNF 0xf0
+#define PC87417_XIOBA1H 0xf1
+#define PC87417_XIOBA1L 0xf2
+#define PC87417_XIOSIZE1 0xf3
+#define PC87417_XIOBA2H 0xf4
+#define PC87417_XIOBA2L 0xf5
+#define PC87417_XIOSIZE2 0xf6
+#define PC87417_XMEMCNF1 0xf7
+#define PC87417_XMEMCNF2 0xf8
+#define PC87417_XMEMBAH 0xf9
+#define PC87417_XMEMBAL 0xfa
+#define PC87417_XMEMSIZE 0xfb
+#define PC87417_XIRQMAP1 0xfc
+#define PC87417_XIRQMAP2 0xfd
+#define PC87417_XBIMM 0xfe
+#define PC87417_XBBSL 0xff
+
+#define PC87417_XBCNF 0x00
+#define PC87417_XZCNF0 0x01
+#define PC87417_XZCNF1 0x02
+#define PC87417_XIRQC0 0x04
+#define PC87417_XIRQC1 0x05
+#define PC87417_XIRQC2 0x06
+#define PC87417_XIMA0 0x08
+#define PC87417_XIMA1 0x09
+#define PC87417_XIMA2 0x0a
+#define PC87417_XIMA3 0x0b
+#define PC87417_XIMD 0x0c
+#define PC87417_XZCNF2 0x0d
+#define PC87417_XZCNF3 0x0e
+#define PC87417_XZM0 0x0f
+#define PC87417_XZM1 0x10
+#define PC87417_XZM2 0x11
+#define PC87417_XZM3 0x12
+#define PC87417_HAP0 0x13
+#define PC87417_HAP1 0x14
+#define PC87417_XSCNF 0x15
+#define PC87417_XWBCNF 0x16
+
+
diff --git a/src/superio/NSC/pc87417/pc87417_early_init.c b/src/superio/NSC/pc87417/pc87417_early_init.c
new file mode 100644
index 0000000000..028f02e66e
--- /dev/null
+++ b/src/superio/NSC/pc87417/pc87417_early_init.c
@@ -0,0 +1,31 @@
+#include <arch/romcc_io.h>
+#include "pc87417.h"
+
+static void pc87417_disable_dev(device_t dev)
+{
+ pnp_set_logical_device(dev);
+ pnp_set_enable(dev, 0);
+}
+static void pc87417_enable_dev(device_t dev, unsigned iobase)
+{
+ pnp_set_logical_device(dev);
+ pnp_set_enable(dev, 0);
+ pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+ pnp_set_enable(dev, 1);
+}
+static void xbus_cfg(device_t dev)
+{
+ uint8_t i, data;
+ uint16_t xbus_index;
+
+ pnp_set_logical_device(dev);
+ /* select proper BIOS size (4MB) */
+ pnp_write_config(dev, PC87417_XMEMCNF2, (pnp_read_config(dev, PC87417_XMEMCNF2)) | 0x04);
+ xbus_index = pnp_read_iobase(dev, 0x60);
+
+ /* enable writes to devices attached to XCS0 (XBUS Chip Select 0) */
+ for (i=0; i<= 0xf; i++) {
+ outb((i<<4), xbus_index + PC87417_HAP0);
+ }
+ return;
+}
diff --git a/src/superio/NSC/pc87417/superio.c b/src/superio/NSC/pc87417/superio.c
new file mode 100644
index 0000000000..2e75f82cd5
--- /dev/null
+++ b/src/superio/NSC/pc87417/superio.c
@@ -0,0 +1,77 @@
+/* Copyright 2000 AG Electronics Ltd. */
+/* Copyright 2003-2004 Linux Networx */
+/* This code is distributed without warranty under the GPL v2 (see COPYING) */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <console/console.h>
+#include <string.h>
+#include <bitops.h>
+#include "chip.h"
+#include "pc87417.h"
+
+
+static void init(device_t dev)
+{
+ struct superio_NSC_pc87417_config *conf;
+ struct resource *res0, *res1;
+ /* Wishlist handle well known programming interfaces more
+ * generically.
+ */
+ if (!dev->enabled) {
+ return;
+ }
+ conf = dev->chip_info;
+ switch(dev->path.u.pnp.device) {
+ case PC87417_SP1:
+ res0 = find_resource(dev, PNP_IDX_IO0);
+ init_uart8250(res0->base, &conf->com1);
+ break;
+ case PC87417_SP2:
+ res0 = find_resource(dev, PNP_IDX_IO0);
+ init_uart8250(res0->base, &conf->com2);
+ break;
+ case PC87417_KBCK:
+ res0 = find_resource(dev, PNP_IDX_IO0);
+ res1 = find_resource(dev, PNP_IDX_IO1);
+ init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+ break;
+ }
+}
+
+static struct device_operations ops = {
+ .read_resources = pnp_read_resources,
+ .set_resources = pnp_set_resources,
+ .enable_resources = pnp_enable_resources,
+ .enable = pnp_enable,
+ .init = init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, PC87417_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
+ { &ops, PC87417_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+ { &ops, PC87417_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+ { &ops, PC87417_SWC, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IO3 | PNP_IRQ0,
+ { 0xfff0, 0 }, { 0xfffc, 0 }, { 0xfffc, 0 }, { 0xfff8, 0 } },
+ { &ops, PC87417_KBCM, PNP_IRQ0 },
+ { &ops, PC87417_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
+ { &ops, PC87417_GPIO, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
+ { &ops, PC87417_WDT, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 } },
+ { &ops, PC87417_FMC, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
+ { &ops, PC87417_XBUS, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
+ { &ops, PC87417_RTC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xfffe, 0 }, { 0xfffe, 0 } },
+ { &ops, PC87417_MHC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffe0, 0 }, { 0xffe0, 0 } },
+};
+
+
+static void enable_dev(struct device *dev)
+{
+ pnp_enable_devices(dev, &ops,
+ sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
+}
+
+struct chip_operations superio_NSC_pc87417_ops = {
+ CHIP_NAME("NSC 87417")
+ .enable_dev = enable_dev,
+};
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-13 00:26:55 +0000