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-rw-r--r--src/ec/lenovo/h8/acpi/thermal.asl6
-rw-r--r--src/mainboard/google/rambi/romstage.c2
-rw-r--r--src/soc/broadcom/cygnus/ddr_init.c6
-rw-r--r--src/southbridge/intel/bd82x6x/pch.h2
-rw-r--r--src/southbridge/intel/fsp_bd82x6x/pch.h2
-rw-r--r--src/southbridge/intel/fsp_i89xx/pch.h2
-rw-r--r--src/southbridge/intel/fsp_rangeley/soc.h2
-rw-r--r--src/southbridge/intel/ibexpeak/pch.h2
-rw-r--r--src/southbridge/intel/lynxpoint/pch.h2
9 files changed, 13 insertions, 13 deletions
diff --git a/src/ec/lenovo/h8/acpi/thermal.asl b/src/ec/lenovo/h8/acpi/thermal.asl
index aaced607a8..86fc31158c 100644
--- a/src/ec/lenovo/h8/acpi/thermal.asl
+++ b/src/ec/lenovo/h8/acpi/thermal.asl
@@ -15,7 +15,7 @@
Scope(\_TZ)
{
-#if defined (EC_LENOVO_H8_ME_WORKAROUND)
+#if defined(EC_LENOVO_H8_ME_WORKAROUND)
Name (MEB1, 0)
Name (MEB2, 0)
#endif
@@ -85,7 +85,7 @@ External (\PPKG, MethodObj)
}
Method(_TMP) {
-#if defined (EC_LENOVO_H8_ME_WORKAROUND)
+#if defined(EC_LENOVO_H8_ME_WORKAROUND)
/* Avoid tripping alarm if ME isn't booted at all yet */
If (LAnd (LNot (MEB1), LEqual (\_SB.PCI0.LPCB.EC.TMP0, 128))) {
Return (C2K(40))
@@ -172,7 +172,7 @@ External (\PPKG, MethodObj)
}
Method(_TMP) {
-#if defined (EC_LENOVO_H8_ME_WORKAROUND)
+#if defined(EC_LENOVO_H8_ME_WORKAROUND)
/* Avoid tripping alarm if ME isn't booted at all yet */
If (LAnd (LNot (MEB2), LEqual (\_SB.PCI0.LPCB.EC.TMP1, 128))) {
Return (C2K(40))
diff --git a/src/mainboard/google/rambi/romstage.c b/src/mainboard/google/rambi/romstage.c
index 25fe85952b..005ddc3bd4 100644
--- a/src/mainboard/google/rambi/romstage.c
+++ b/src/mainboard/google/rambi/romstage.c
@@ -35,7 +35,7 @@ static void *get_spd_pointer(char *spd_file_content, int total_spds, int *dual)
#ifdef GPIO_SSUS_40_PAD_USE_PULLDOWN
/* To prevent floating pin on shipped systems. */
ssus_enable_internal_pull(GPIO_SSUS_40_PAD, PAD_PULL_DOWN | PAD_PU_20K);
-#elif defined (GPIO_SSUS_40_PAD)
+#elif defined(GPIO_SSUS_40_PAD)
ssus_disable_internal_pull(GPIO_SSUS_40_PAD);
#endif
ram_id |= (ssus_get_gpio(GPIO_SSUS_37_PAD) << 0);
diff --git a/src/soc/broadcom/cygnus/ddr_init.c b/src/soc/broadcom/cygnus/ddr_init.c
index 1a5fd86bb0..c2084576c1 100644
--- a/src/soc/broadcom/cygnus/ddr_init.c
+++ b/src/soc/broadcom/cygnus/ddr_init.c
@@ -713,7 +713,7 @@ static int write_shmoo_to_flash(void *buf, int length)
return ret;
}
-#elif defined (CONFIG_SPI_FLASH) && defined(CONFIG_ENV_IS_IN_SPI_FLASH) && CONFIG_ENV_IS_IN_SPI_FLASH
+#elif defined(CONFIG_SPI_FLASH) && defined(CONFIG_ENV_IS_IN_SPI_FLASH) && CONFIG_ENV_IS_IN_SPI_FLASH
static int write_shmoo_to_flash(void *buf, int length)
{
@@ -761,7 +761,7 @@ static int write_shmoo_to_flash(void *buf, int length)
return ret;
}
-#elif defined (CONFIG_ENV_IS_IN_FLASH)
+#elif defined(CONFIG_ENV_IS_IN_FLASH)
static int write_shmoo_to_flash(void *buf, int length)
{
@@ -841,7 +841,7 @@ static volatile uint32_t *validate_flash_shmoo_values(struct shmoo_signature *ps
/* Read SHMOO data from NAND */
flptr = (volatile uint32_t *)(IPROC_NAND_MEM_BASE + CONFIG_SHMOO_REUSE_NAND_OFFSET);
offset = (CONFIG_SHMOO_REUSE_NAND_RANGE - 1) / SHMOO_MIN_BLOCK_SIZE * SHMOO_MIN_BLOCK_SIZE;
-#elif defined (CONFIG_ENV_IS_IN_FLASH)
+#elif defined(CONFIG_ENV_IS_IN_FLASH)
/* Read SHMOO data from NOR */
flptr = (volatile uint32_t *)(IPROC_NOR_MEM_BASE + CONFIG_SHMOO_REUSE_NOR_OFFSET);
offset = 0;
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index ebcb058c0b..d7656b33c1 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -54,7 +54,7 @@
#ifndef __ACPI__
#define DEBUG_PERIODIC_SMIS 0
-#if defined (__SMM__) && !defined(__ASSEMBLER__)
+#if defined(__SMM__) && !defined(__ASSEMBLER__)
void intel_pch_finalize_smm(void);
#endif
diff --git a/src/southbridge/intel/fsp_bd82x6x/pch.h b/src/southbridge/intel/fsp_bd82x6x/pch.h
index 5b42271265..1f1c18ae61 100644
--- a/src/southbridge/intel/fsp_bd82x6x/pch.h
+++ b/src/southbridge/intel/fsp_bd82x6x/pch.h
@@ -55,7 +55,7 @@
#ifndef __ACPI__
#define DEBUG_PERIODIC_SMIS 0
-#if defined (__SMM__) && !defined(__ASSEMBLER__)
+#if defined(__SMM__) && !defined(__ASSEMBLER__)
void intel_pch_finalize_smm(void);
#endif
diff --git a/src/southbridge/intel/fsp_i89xx/pch.h b/src/southbridge/intel/fsp_i89xx/pch.h
index 447178865c..a1d2a4b303 100644
--- a/src/southbridge/intel/fsp_i89xx/pch.h
+++ b/src/southbridge/intel/fsp_i89xx/pch.h
@@ -54,7 +54,7 @@
#ifndef __ACPI__
#define DEBUG_PERIODIC_SMIS 0
-#if defined (__SMM__) && !defined(__ASSEMBLER__)
+#if defined(__SMM__) && !defined(__ASSEMBLER__)
void intel_pch_finalize_smm(void);
#endif
diff --git a/src/southbridge/intel/fsp_rangeley/soc.h b/src/southbridge/intel/fsp_rangeley/soc.h
index eaf9556df5..09172016e8 100644
--- a/src/southbridge/intel/fsp_rangeley/soc.h
+++ b/src/southbridge/intel/fsp_rangeley/soc.h
@@ -50,7 +50,7 @@
#ifndef __ACPI__
#define DEBUG_PERIODIC_SMIS 0
-#if defined (__SMM__) && !defined(__ASSEMBLER__)
+#if defined(__SMM__) && !defined(__ASSEMBLER__)
void intel_soc_finalize_smm(void);
#endif
diff --git a/src/southbridge/intel/ibexpeak/pch.h b/src/southbridge/intel/ibexpeak/pch.h
index f9583e0a01..4e86c82dbd 100644
--- a/src/southbridge/intel/ibexpeak/pch.h
+++ b/src/southbridge/intel/ibexpeak/pch.h
@@ -49,7 +49,7 @@
#ifndef __ACPI__
#define DEBUG_PERIODIC_SMIS 0
-#if defined (__SMM__) && !defined(__ASSEMBLER__)
+#if defined(__SMM__) && !defined(__ASSEMBLER__)
void intel_pch_finalize_smm(void);
#endif
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index f14a339d7b..70f2834cd0 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -91,7 +91,7 @@
#ifndef __ACPI__
-#if defined (__SMM__) && !defined(__ASSEMBLER__)
+#if defined(__SMM__) && !defined(__ASSEMBLER__)
void intel_pch_finalize_smm(void);
void usb_ehci_sleep_prepare(device_t dev, u8 slp_typ);
void usb_ehci_disable(device_t dev);
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-11 14:01:18 +0000