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-rw-r--r--src/mainboard/digitallogic/adl855pc/auto.c19
-rw-r--r--src/northbridge/intel/i855pm/raminit.c14
-rw-r--r--src/southbridge/intel/i82801dbm/i82801dbm_early_smbus.c4
3 files changed, 19 insertions, 18 deletions
diff --git a/src/mainboard/digitallogic/adl855pc/auto.c b/src/mainboard/digitallogic/adl855pc/auto.c
index 087f3da5cc..f1e831e947 100644
--- a/src/mainboard/digitallogic/adl855pc/auto.c
+++ b/src/mainboard/digitallogic/adl855pc/auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define ASM_CONSOLE_LOGLEVEL 10
+#define ASM_CONSOLE_LOGLEVEL 8
#include <stdint.h>
#include <device/pci_def.h>
#include <arch/io.h>
@@ -80,29 +80,28 @@ static void main(unsigned long bist)
w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE);
uart_init();
console_init();
- print_err("HARD MAIN0\n");
+
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
- print_err("HARD MAIN\n");
-#if 1
+
+#if 0
print_pci_devices();
#endif
- print_err("after print pci dev \n");
+
if(!bios_reset_detected()) {
enable_smbus();
- print_err("after enable smbus\n");
-#if 1
+#if 0
dump_spd_registers(&memctrl[0]);
// dump_smbus_registers();
#endif
- print_err("after dump spd registers\n");
+
memreset_setup();
- print_err("memreset setup\n");
+
sdram_initialize(sizeof(memctrl)/sizeof(memctrl[0]), memctrl);
- print_err("sdram init\n");
+
}
#if 0
else {
diff --git a/src/northbridge/intel/i855pm/raminit.c b/src/northbridge/intel/i855pm/raminit.c
index 64266d26e6..07dac67a73 100644
--- a/src/northbridge/intel/i855pm/raminit.c
+++ b/src/northbridge/intel/i855pm/raminit.c
@@ -17,9 +17,9 @@
/* converted to C 6/2004 yhlu */
-#define DEBUG_RAM_CONFIG 12
+#define DEBUG_RAM_CONFIG 2
#undef ASM_CONSOLE_LOGLEVEL
-#define ASM_CONSOLE_LOGLEVEL 10
+#define ASM_CONSOLE_LOGLEVEL 8
#define dumpnorth() dump_pci_device(PCI_DEV(0, 0, 1))
/* DDR DIMM Mode register Definitions */
@@ -380,14 +380,14 @@ static void write_8dwords(uint32_t src_addr, uint32_t dst_addr) {
static void ram_set_d0f0_regs(const struct mem_controller *ctrl) {
#if DEBUG_RAM_CONFIG
- dumpnorth();
+ //dumpnorth();
#endif
int i;
int max;
max = sizeof(register_values)/sizeof(register_values[0]);
for(i = 0; i < max; i += 3) {
uint32_t reg;
-#if DEBUG_RAM_CONFIG
+#if DEBUG_RAM_CONFIG >=2
print_debug_hex32(register_values[i]);
print_debug(" <-");
print_debug_hex32(register_values[i+2]);
@@ -1395,10 +1395,10 @@ static void dram_finish(const struct mem_controller *ctrl)
if(dword == 1) {
#if DEBUG_RAM_CONFIG
- print_debug(ecc_pre_init);
+// print_debug(ecc_pre_init);
#endif
#if DEBUG_RAM_CONFIG
- print_debug(ecc_post_init);
+// print_debug(ecc_post_init);
#endif
#if 0
/* Clear the ECC error bits */
@@ -1409,7 +1409,7 @@ static void dram_finish(const struct mem_controller *ctrl)
}
#if DEBUG_RAM_CONFIG
- dumpnorth();
+// dumpnorth();
#endif
/* verify_ram(); */
diff --git a/src/southbridge/intel/i82801dbm/i82801dbm_early_smbus.c b/src/southbridge/intel/i82801dbm/i82801dbm_early_smbus.c
index 82bcf761b9..39bd971fbd 100644
--- a/src/southbridge/intel/i82801dbm/i82801dbm_early_smbus.c
+++ b/src/southbridge/intel/i82801dbm/i82801dbm_early_smbus.c
@@ -105,7 +105,7 @@ static int smbus_read_byte(unsigned device, unsigned address)
unsigned char global_status_register;
unsigned char byte;
-print_err("smbus_read_byte\r\n");
+ /*print_err("smbus_read_byte\r\n");*/
if (smbus_wait_until_ready() < 0) {
print_err_hex8(-2);
return -2;
@@ -150,9 +150,11 @@ print_err("smbus_read_byte\r\n");
print_err_hex8(-1);
return -1;
}
+/*
print_err("smbus_read_byte: ");
print_err_hex32(device); print_err(" ad "); print_err_hex32(address);
print_err("value "); print_err_hex8(byte); print_err("\r\n");
+ */
return byte;
}
#if 0