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-rw-r--r--src/mainboard/google/zork/variants/vilboz/variant.c2
-rw-r--r--src/soc/amd/common/block/include/amdblocks/acp.h3
-rw-r--r--src/soc/amd/picasso/chip.h2
-rw-r--r--src/soc/amd/picasso/fch.c6
4 files changed, 6 insertions, 7 deletions
diff --git a/src/mainboard/google/zork/variants/vilboz/variant.c b/src/mainboard/google/zork/variants/vilboz/variant.c
index df82698b66..43ca0e51df 100644
--- a/src/mainboard/google/zork/variants/vilboz/variant.c
+++ b/src/mainboard/google/zork/variants/vilboz/variant.c
@@ -45,7 +45,7 @@ void variant_devtree_update(void)
/* b:/174121847 Use external OSC to mitigate noise for WWAN sku. */
if (variant_has_wwan()) {
- soc_cfg->common_config.acp_config.acp_i2s_use_external_48mhz_osc = 1;
+ soc_cfg->acp_i2s_use_external_48mhz_osc = 1;
/* eDP phy tuning settings */
soc_cfg->edp_phy_override = ENABLE_EDP_TUNINGSET;
diff --git a/src/soc/amd/common/block/include/amdblocks/acp.h b/src/soc/amd/common/block/include/amdblocks/acp.h
index f091c0540f..36edfa1bdb 100644
--- a/src/soc/amd/common/block/include/amdblocks/acp.h
+++ b/src/soc/amd/common/block/include/amdblocks/acp.h
@@ -17,9 +17,6 @@ struct acp_config {
u8 acp_i2s_wake_enable;
/* Enable ACP PME (0 = disable, 1 = enable) */
u8 acp_pme_enable;
-
- /* If using an external 48MHz OSC for codec, will disable internal X48M_OSC */
- bool acp_i2s_use_external_48mhz_osc;
};
#endif /* AMD_COMMON_ACP_H */
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h
index d59a4c8207..d2ce1bcfdc 100644
--- a/src/soc/amd/picasso/chip.h
+++ b/src/soc/amd/picasso/chip.h
@@ -257,6 +257,8 @@ struct soc_amd_picasso_config {
/* The array index is the general purpose PCIe clock output number. */
enum gpp_clk_req_setting gpp_clk_config[GPP_CLK_OUTPUT_COUNT];
+ /* If using an external 48MHz OSC for codec, will disable internal X48M_OSC */
+ bool acp_i2s_use_external_48mhz_osc;
/* eDP phy tuning settings */
uint16_t edp_phy_override;
diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c
index a871ccf9cb..e1c0eba9b5 100644
--- a/src/soc/amd/picasso/fch.c
+++ b/src/soc/amd/picasso/fch.c
@@ -90,12 +90,12 @@ const struct irq_idx_name *sb_get_apic_reg_association(size_t *size)
void sb_clk_output_48Mhz(void)
{
u32 ctrl;
- const struct soc_amd_common_config *cfg = soc_get_common_config();
+ const struct soc_amd_picasso_config *cfg = config_of_soc();
ctrl = misc_read32(MISC_CLK_CNTL1);
/* If used external clock source for I2S, disable the internal clock output */
- if (cfg->acp_config.acp_i2s_use_external_48mhz_osc &&
- cfg->acp_config.acp_pin_cfg == I2S_PINS_I2S_TDM)
+ if (cfg->acp_i2s_use_external_48mhz_osc &&
+ cfg->common_config.acp_config.acp_pin_cfg == I2S_PINS_I2S_TDM)
ctrl &= ~BP_X48M0_OUTPUT_EN;
else
ctrl |= BP_X48M0_OUTPUT_EN;