diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/include/metadata_hash.h | 1 | ||||
| -rw-r--r-- | src/lib/metadata_hash.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/msr.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/acpi/gpio.asl | 1 | ||||
| -rw-r--r-- | src/vendorcode/amd/agesa/Kconfig | 1 |
5 files changed, 0 insertions, 5 deletions
diff --git a/src/include/metadata_hash.h b/src/include/metadata_hash.h index bfa7ef1fb6..e945300cc8 100644 --- a/src/include/metadata_hash.h +++ b/src/include/metadata_hash.h @@ -1,5 +1,4 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* This file is part of the coreboot project. */ #ifndef _METADATA_HASH_H_ #define _METADATA_HASH_H_ diff --git a/src/lib/metadata_hash.c b/src/lib/metadata_hash.c index 5619efea7f..e10f6ffee5 100644 --- a/src/lib/metadata_hash.c +++ b/src/lib/metadata_hash.c @@ -1,5 +1,4 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* This file is part of the coreboot project. */ #include <assert.h> #include <metadata_hash.h> diff --git a/src/soc/intel/apollolake/include/soc/msr.h b/src/soc/intel/apollolake/include/soc/msr.h index cee11c29a8..e35c8814eb 100644 --- a/src/soc/intel/apollolake/include/soc/msr.h +++ b/src/soc/intel/apollolake/include/soc/msr.h @@ -1,5 +1,4 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* This file is part of the coreboot project. */ #ifndef _SOC_MSR_H_ #define _SOC_MSR_H_ diff --git a/src/soc/intel/xeon_sp/acpi/gpio.asl b/src/soc/intel/xeon_sp/acpi/gpio.asl index 6fe3d51588..c7a9f9589e 100644 --- a/src/soc/intel/xeon_sp/acpi/gpio.asl +++ b/src/soc/intel/xeon_sp/acpi/gpio.asl @@ -1,5 +1,4 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* This file is part of the coreboot project. */ #include <soc/gpio.h> #include <soc/pcr_ids.h> diff --git a/src/vendorcode/amd/agesa/Kconfig b/src/vendorcode/amd/agesa/Kconfig index 67055ea5dc..ce59fe1082 100644 --- a/src/vendorcode/amd/agesa/Kconfig +++ b/src/vendorcode/amd/agesa/Kconfig @@ -1,5 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only -# This file is part of the coreboot project. choice prompt "DDR3 memory profile" |