diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/southbridge/amd/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/agesa/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/Kconfig | 34 | ||||
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/Makefile.inc | 202 | ||||
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/acpi/fch.asl | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/amd_pci_int_defs.h | 6 | ||||
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/amd_pci_int_types.h | 10 |
7 files changed, 246 insertions, 11 deletions
diff --git a/src/southbridge/amd/Makefile.inc b/src/southbridge/amd/Makefile.inc index 57128d9cac..0e3f78536a 100644 --- a/src/southbridge/amd/Makefile.inc +++ b/src/southbridge/amd/Makefile.inc @@ -16,9 +16,11 @@ subdirs-$(CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800) += cimx subdirs-$(CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900) += cimx subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON) += agesa subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE) += agesa +subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_AVALON) += agesa ramstage-$(CONFIG_SOUTHBRIDGE_AMD_CIMX_SB700) += amd_pci_util.c ramstage-$(CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800) += amd_pci_util.c ramstage-$(CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900) += amd_pci_util.c ramstage-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON) += amd_pci_util.c ramstage-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE) += amd_pci_util.c +ramstage-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_AVALON) += amd_pci_util.c diff --git a/src/southbridge/amd/agesa/Makefile.inc b/src/southbridge/amd/agesa/Makefile.inc index fdd5d8047a..35889c4e6e 100644 --- a/src/southbridge/amd/agesa/Makefile.inc +++ b/src/southbridge/amd/agesa/Makefile.inc @@ -18,3 +18,4 @@ # subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON) += hudson subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE) += hudson +subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AGESA_AVALON) += hudson diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig index 5c036da28b..9ff6ef1622 100644 --- a/src/southbridge/amd/agesa/hudson/Kconfig +++ b/src/southbridge/amd/agesa/hudson/Kconfig @@ -29,7 +29,13 @@ config SOUTHBRIDGE_AMD_AGESA_YANGTZE select HAVE_USBDEBUG_OPTIONS select HAVE_HARD_RESET -if SOUTHBRIDGE_AMD_AGESA_HUDSON || SOUTHBRIDGE_AMD_AGESA_YANGTZE +config SOUTHBRIDGE_AMD_AGESA_AVALON + bool + select IOAPIC + select HAVE_USBDEBUG_OPTIONS + select HAVE_HARD_RESET + +if SOUTHBRIDGE_AMD_AGESA_HUDSON || SOUTHBRIDGE_AMD_AGESA_YANGTZE || SOUTHBRIDGE_AMD_AGESA_AVALON config BOOTBLOCK_SOUTHBRIDGE_INIT string @@ -59,8 +65,13 @@ config HUDSON_XHCI_FWM help Add Hudson 2/3/4 XHCI Firmware to support the onboard USB 3.0 +config HUDSON_DISABLE_IMC + bool + default n + config HUDSON_IMC_FWM - bool "Add imc firmware" + bool "Add IMC firmware" + depends on !HUDSON_DISABLE_IMC default y help Add Hudson 2/3/4 IMC Firmware to support the onboard fan control @@ -72,16 +83,22 @@ config HUDSON_GEC_FWM Add Hudson 2/3/4 GEC Firmware to support the onboard gigabit Ethernet MAC. Must be connected to a Broadcom B50610 or B50610M PHY on the motherboard. +config HUDSON_PSP + bool + default y if CPU_AMD_AGESA_00730F01 + config HUDSON_XHCI_FWM_FILE string "XHCI firmware path and filename" default "3rdparty/southbridge/amd/hudson/xhci.bin" if SOUTHBRIDGE_AMD_AGESA_HUDSON default "3rdparty/southbridge/amd/yangtze/xhci.bin" if SOUTHBRIDGE_AMD_AGESA_YANGTZE + default "3rdparty/southbridge/amd/avalon/xhci.bin" if SOUTHBRIDGE_AMD_AGESA_AVALON depends on HUDSON_XHCI_FWM config HUDSON_IMC_FWM_FILE string "IMC firmware path and filename" default "3rdparty/southbridge/amd/hudson/imc.bin" if SOUTHBRIDGE_AMD_AGESA_HUDSON default "3rdparty/southbridge/amd/yangtze/imc.bin" if SOUTHBRIDGE_AMD_AGESA_YANGTZE + default "3rdparty/southbridge/amd/avalon/imc.bin" if SOUTHBRIDGE_AMD_AGESA_AVALON depends on HUDSON_IMC_FWM config HUDSON_GEC_FWM_FILE @@ -92,8 +109,8 @@ config HUDSON_GEC_FWM_FILE config HUDSON_FWM bool - default y if HUDSON_XHCI_FWM || HUDSON_IMC_FWM || HUDSON_GEC_FWM - default n if !HUDSON_XHCI_FWM && !HUDSON_IMC_FWM && !HUDSON_GEC_FWM + default y if HUDSON_XHCI_FWM || HUDSON_IMC_FWM || HUDSON_GEC_FWM || HUDSON_PSP + default n if HUDSON_FWM @@ -118,6 +135,11 @@ config HUDSON_FWM_POSITION 0xFF020000 if flash chip size is 16M endif # HUDSON_FWM +config AMD_PUBKEY_FILE + depends on HUDSON_PSP + string "AMD public Key" + default "3rdparty/southbridge/amd/avalon/PSP/AmdPubKey.bin" if CPU_AMD_AGESA_00730F01 + choice prompt "SATA Mode" default HUDSON_SATA_IDE @@ -222,9 +244,9 @@ config HUDSON_LEGACY_FREE Select y if there is no keyboard controller in the system. This sets variables in AGESA and ACPI. -endif # SOUTHBRIDGE_AMD_AGESA_HUDSON || SOUTHBRIDGE_AMD_AGESA_YANGTZE +endif # SOUTHBRIDGE_AMD_AGESA_HUDSON || SOUTHBRIDGE_AMD_AGESA_YANGTZE || SOUTHBRIDGE_AMD_AGESA_AVALON -if SOUTHBRIDGE_AMD_AGESA_YANGTZE +if SOUTHBRIDGE_AMD_AGESA_YANGTZE || SOUTHBRIDGE_AMD_AGESA_AVALON config AZ_PIN hex default 0xaa diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc index 492f9f3e31..5e206bcf2f 100644 --- a/src/southbridge/amd/agesa/hudson/Makefile.inc +++ b/src/southbridge/amd/agesa/hudson/Makefile.inc @@ -1,3 +1,35 @@ +#***************************************************************************** +# +# Copyright (c) 2012, Advanced Micro Devices, Inc. +# 2013 - 2014, Sage Electronic Engineering, LLC +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are met: +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# * Neither the name of Advanced Micro Devices, Inc. nor the names of +# its contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +# DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY +# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +#***************************************************************************** + +INCLUDES += -Isrc/southbridge/amd/agesa/hudson + romstage-y += smbus.c ramstage-y += hudson.c ramstage-y += usb.c @@ -17,10 +49,10 @@ ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c romstage-y += early_setup.c ramstage-$(CONFIG_SPI_FLASH) += spi.c -ramstage-y += resume.c +ramstage-$(CONFIG_HAVE_ACPI_RESUME) += resume.c -romstage-y += imc.c -ramstage-y += imc.c +romstage-$(CONFIG_HUDSON_IMC_FWM) += imc.c +ramstage-$(CONFIG_HUDSON_IMC_FWM) += imc.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c smi_util.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smi_util.c @@ -29,7 +61,14 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smi_util.c # +-----------+---------------+----------------+------------+ # |0x55AA55AA |EC ROM Address |GEC ROM Address |USB3 ROM | # +-----------+---------------+----------------+------------+ +# |PSPDIR ADDR| +# +-----------+ +# # EC ROM should be 64K aligned. + +# HVB(Hardware Validated Boot) or Bypass +CONFIG_HVB=Bypass + HUDSON_FWM_POSITION=$(shell printf %u $(CONFIG_HUDSON_FWM_POSITION)) #assume the cbfs header is less than 128 bytes. @@ -63,6 +102,11 @@ else HUDSON_IMC_POSITION=0 endif +HUDSON_PSP_DIRECTORY_POSITION=0 +ifeq ($(CONFIG_CPU_AMD_AGESA_00730F01), y) +HUDSON_PSP_DIRECTORY_POSITION=$(shell echo $(HUDSON_FWM_POSITION) 262144 | awk '{printf("%.0f", $$1 + $$2)}') +endif + $(obj)/coreboot_hudson_romsig.bin: $(call strip_quotes, $(CONFIG_HUDSON_XHCI_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_HUDSON_IMC_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_HUDSON_GEC_FWM_FILE)) \ @@ -71,7 +115,8 @@ $(obj)/coreboot_hudson_romsig.bin: $(call strip_quotes, $(CONFIG_HUDSON_XHCI_FWM for fwm in 1437226410 \ $(HUDSON_IMC_POSITION) \ $(HUDSON_GEC_POSITION) \ - $(HUDSON_XHCI_POSITION) ; do \ + $(HUDSON_XHCI_POSITION) \ + $(HUDSON_PSP_DIRECTORY_POSITION); do \ echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \ done > $@ @@ -115,3 +160,152 @@ pci$(stripped_ahci_rom_id).rom-type := optionrom pci$(stripped_ahci_rom_id).rom-required := Hudson AHCI Option ROM (Contact your AMD representative) #endif endif + +ifeq ($(CONFIG_HUDSON_PSP), y) + +# 0 +# catenate the pubkey and pspdir together to save some space. +AMDPUBKEY_POS=$(shell echo $(HUDSON_PSP_DIRECTORY_POSITION) | awk '{printf("%.0f", $$1 + 0x100)}') #$(shell printf %u 0xFFb00100) +AMDPUBKEY_SIZE=$(word 5,$(shell ls -l $(CONFIG_AMD_PUBKEY_FILE))) + +ifeq ($(CONFIG_CPU_AMD_AGESA_00730F01), y) +FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE))) +FIRMWARE_TYPE= +endif +# 1 +CONFIG_PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader$(FIRMWARE_TYPE).$(CONFIG_HVB).sbin +PSPBTLDR_POS=$(shell echo $(HUDSON_PSP_DIRECTORY_POSITION) | awk '{printf("%.0f", $$1 + 0x1000)}') #$(shell printf %u 0xFFb10000) +PSPBTLDR_SIZE=$(word 5,$(shell ls -l $(CONFIG_PSPBTLDR_FILE))) +cbfs-files-y += hudson/pspbtldr +hudson/pspbtldr-file := $(CONFIG_PSPBTLDR_FILE) +hudson/pspbtldr-position := $(PSPBTLDR_POS) +hudson/pspbtldr-type := raw + +#8 +CONFIG_SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE).sbin +SMUFWM_POS=$(shell echo $(HUDSON_PSP_DIRECTORY_POSITION) | awk '{printf("%.0f", $$1 + 0xb000)}') #$(shell printf %u 0xFFb20000) +SMUFWM_SIZE=$(word 5,$(shell ls -l $(CONFIG_SMUFWM_FILE))) +cbfs-files-y += hudson/smufwm +hudson/smufwm-file := $(CONFIG_SMUFWM_FILE) +hudson/smufwm-position := $(SMUFWM_POS) +hudson/smufwm-type := raw + +#3 +CONFIG_PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecovery$(FIRMWARE_TYPE).sbin +PSPRCVR_POS=$(shell echo $(HUDSON_PSP_DIRECTORY_POSITION) | awk '{printf("%.0f", $$1 + 0x30000)}') #$(shell printf %u 0xFFBb0000) +PSPRCVR_SIZE=$(word 5,$(shell ls -l $(CONFIG_PSPRCVR_FILE))) +cbfs-files-y += hudson/psprcvr +hudson/psprcvr-file := $(CONFIG_PSPRCVR_FILE) +hudson/psprcvr-position := $(PSPRCVR_POS) +hudson/psprcvr-type := raw + +# 5 +CONFIG_PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).key +PUBSIGNEDKEY_POS=$(shell echo $(HUDSON_PSP_DIRECTORY_POSITION) | awk '{printf("%.0f", $$1 + 0x400)}') #$(shell printf %u 0xFFb00400) +PUBSIGNEDKEY_SIZE=$(word 5,$(shell ls -l $(CONFIG_PUBSIGNEDKEY_FILE))) +cbfs-files-y += hudson/pubsignedkey +hudson/pubsignedkey-file := $(CONFIG_PUBSIGNEDKEY_FILE) +hudson/pubsignedkey-position := $(PUBSIGNEDKEY_POS) +hudson/pubsignedkey-type := raw + +# 2 +CONFIG_PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs$(FIRMWARE_TYPE).sbin +PSPSECUREOS_POS=$(shell echo $(HUDSON_PSP_DIRECTORY_POSITION) | awk '{printf("%.0f", $$1 + 0x3A000)}') #$(shell printf %u 0xFFbc0000) +PSPSECUREOS_SIZE=$(word 5,$(shell ls -l $(CONFIG_PSPSCUREOS_FILE))) +cbfs-files-y += hudson/pspsecureos +hudson/pspsecureos-file := $(CONFIG_PSPSCUREOS_FILE) +hudson/pspsecureos-position := $(PSPSECUREOS_POS) +hudson/pspsecureos-type := raw + +# 4 +CONFIG_PSPNVRAM_FILE=$(top)/$(FIRMWARE_LOCATE)/PspNvram$(FIRMWARE_TYPE).bin +PSPNVRAM_POS=$(shell echo $(HUDSON_PSP_DIRECTORY_POSITION) | awk '{printf("%.0f", $$1 + 0x64000)}') #$(shell printf %u 0xFFbf0000) +PSPNVRAM_SIZE=$(word 5,$(shell ls -l $(CONFIG_PSPNVRAM_FILE))) +cbfs-files-y += hudson/pspnvram +hudson/pspnvram-file := $(CONFIG_PSPNVRAM_FILE) +hudson/pspnvram-position := $(PSPNVRAM_POS) +hudson/pspnvram-type := raw + +ifeq ($(CONFIG_HVB), HVB) +# 6 +RTM_FILE=$(objcbfs)/bootblock.bin #The file size need to be 256 bytes aligned. +RTM_SIZE=$(word 5,$(shell ls -l $(RTM_FILE))) +RTM_POS=$(shell echo 4294967296 $(RTM_SIZE) | awk '{print $$1 - $$2}') + +# 7 +RTMSIGN_FILE=$(obj)/bootblock_sig.bin +RTMSIGN_POS=$(shell echo $(HUDSON_PSP_DIRECTORY_POSITION) | awk '{printf("%.0f", $$1 + 0x800)}') #$(shell printf %u 0xFFb00800) +RTMSIGN_SIZE=256 #it should be hardcoded to 256, otherwise circular dependency comes up.$(word 5,$(shell ls -l $(RTMSIGN_FILE))) +cbfs-files-y += hudson/rtmsign +hudson/rtmsign-file := $(RTMSIGN_FILE) +hudson/rtmsign-position := $(RTMSIGN_POS) +hudson/rtmsign-type := raw +endif + +CONFIG_SMUSCS_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuScs$(FIRMWARE_TYPE).bin +SMUSCS_POS=$(shell echo $(HUDSON_PSP_DIRECTORY_POSITION) | awk '{printf("%.0f", $$1 + 0x6d000)}') #$(shell printf %u 0xFFC00000) +SMUSCS_SIZE=$(word 5,$(shell ls -l $(CONFIG_SMUSCS_FILE))) +cbfs-files-y += hudson/smuscs +hudson/smuscs-file := $(CONFIG_SMUSCS_FILE) +hudson/smuscs-position := $(SMUSCS_POS) +hudson/smuscs-type := raw + +define output_hex +echo $(1) | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}' +endef + +$(obj)/coreboot_psp_directory.bin: $(obj)/config.h $(FLETCHER) $(RTM_FILE) + echo " PSPDir $@" + for fwm in 0 $(AMDPUBKEY_SIZE) $(AMDPUBKEY_POS) 0; do \ + echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \ + done > $@_tail.tmp + for fwm in 1 $(PSPBTLDR_SIZE) $(PSPBTLDR_POS) 0; do \ + echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \ + done >> $@_tail.tmp + for fwm in 8 $(SMUFWM_SIZE) $(SMUFWM_POS) 0; do \ + echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \ + done >> $@_tail.tmp + for fwm in 3 $(PSPRCVR_SIZE) $(PSPRCVR_POS) 0; do \ + echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \ + done >> $@_tail.tmp + for fwm in 5 $(PUBSIGNEDKEY_SIZE) $(PUBSIGNEDKEY_POS) 0; do \ + echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \ + done >> $@_tail.tmp +ifeq ($(CONFIG_HVB), HVB) + for fwm in 6 $(RTM_SIZE) $(RTM_POS) 0; do \ + echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \ + done >> $@_tail.tmp + for fwm in 7 $(RTMSIGN_SIZE) $(RTMSIGN_POS) 0; do \ + echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \ + done >> $@_tail.tmp +endif + for fwm in 2 $(PSPSECUREOS_SIZE) $(PSPSECUREOS_POS) 0; do \ + echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \ + done >> $@_tail.tmp + for fwm in 4 $(PSPNVRAM_SIZE) $(PSPNVRAM_POS) 0; do \ + echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \ + done >> $@_tail.tmp + for fwm in 95 $(SMUSCS_SIZE) $(SMUSCS_POS) 0; do \ + echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \ + done >> $@_tail.tmp + for fwm in 11 4294967295 0 0; do \ + echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \ + done >> $@_tail.tmp + for fwm in 1347637284 0 `ls -l $@_tail.tmp | awk '{printf("%d", $$5/16);}'` 0; do \ + echo $$fwm | LC_ALL=C awk '{printf ("%c%c%c%c", $$1 % 256, int($$1/256) % 256, int($$1/65536) % 256, int($$1/16777216));}'; \ + done > $@_head.tmp + cat $@_head.tmp $@_tail.tmp > $@.tmp + $(FLETCHER) < $@.tmp > $@ + rm $@_head.tmp $@_tail.tmp $@.tmp + +$(obj)/coreboot_psp_directory_combine_pubkey.bin: $(obj)/coreboot_psp_directory.bin + cat $(obj)/coreboot_psp_directory.bin > $@ + ls -l $(obj)/coreboot_psp_directory.bin | LC_ALL=C awk '{for (i=0; i<256-$$5; i++) {printf "%c", 255}}' >> $@ + cat $(top)/$(FIRMWARE_LOCATE)/AmdPubKey$(FIRMWARE_TYPE).bin >> $@ + +cbfs-files-y += hudson/pspdir +hudson/pspdir-file := $(obj)/coreboot_psp_directory_combine_pubkey.bin +hudson/pspdir-position := $(HUDSON_PSP_DIRECTORY_POSITION) +hudson/pspdir-type := raw + +endif diff --git a/src/southbridge/amd/agesa/hudson/acpi/fch.asl b/src/southbridge/amd/agesa/hudson/acpi/fch.asl index 997677ef8c..4ffd19fd7d 100644 --- a/src/southbridge/amd/agesa/hudson/acpi/fch.asl +++ b/src/southbridge/amd/agesa/hudson/acpi/fch.asl @@ -66,7 +66,7 @@ Device(SDCN) { Name(_ADR, 0x00140007) } /* end SDCN */ -#if !CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE +#if !CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE && !CONFIG_SOUTHBRIDGE_AMD_AGESA_AVALON /* 0:14.4 - PCI slot 1, 2, 3 */ Device(PIBR) { diff --git a/src/southbridge/amd/agesa/hudson/amd_pci_int_defs.h b/src/southbridge/amd/agesa/hudson/amd_pci_int_defs.h index 01f769c46d..f66547158d 100644 --- a/src/southbridge/amd/agesa/hudson/amd_pci_int_defs.h +++ b/src/southbridge/amd/agesa/hudson/amd_pci_int_defs.h @@ -29,6 +29,8 @@ #define FCH_INT_TABLE_SIZE 0x54 #elif IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE) #define FCH_INT_TABLE_SIZE 0x42 +#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_AVALON) +#define FCH_INT_TABLE_SIZE 0x63 #endif #define PIRQ_NC 0x1F /* Not Used */ @@ -73,6 +75,10 @@ #define PIRQ_OHCI4 0x36 /* USB OHCI 14h.5 */ #define PIRQ_IDE 0x40 /* IDE 14h.1 */ #define PIRQ_SATA 0x41 /* SATA 11h.0 */ +#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_AVALON) +#define PIRQ_SD 0x17 /* SD */ +#define PIRQ_GPIO 0x62 /* GPIO Controller Interrupt */ +#endif #if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON) #define PIRQ_SD 0x42 /* SD 14h.7 */ #define PIRQ_GPP0 0x50 /* GPP INT 0 */ diff --git a/src/southbridge/amd/agesa/hudson/amd_pci_int_types.h b/src/southbridge/amd/agesa/hudson/amd_pci_int_types.h index 75efd67192..7788ed10b4 100644 --- a/src/southbridge/amd/agesa/hudson/amd_pci_int_types.h +++ b/src/southbridge/amd/agesa/hudson/amd_pci_int_types.h @@ -39,6 +39,16 @@ const char * intr_types[] = { [0x30] = "Dev18.0 INTA", "Dev18.2 INTB", "Dev19.0 INTA", "Dev19.2 INTB", "Dev22.0 INTA", "Dev22.2 INTB", [0x40] = "RSVD\t", "SATA\t", }; +#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_AVALON) +const char * intr_types[] = { + [0x00] = "INTA#\t", "INTB#\t", "INTC#\t", "INTD#\t", "INTE#\t", "INTF#\t", "INTG#\t", "INTH#\t", + [0x08] = "Misc\t", "Misc0\t", "Misc1\t", "Misc2\t", "Ser IRQ INTA", "Ser IRQ INTB", "Ser IRQ INTC", "Ser IRQ INTD", + [0x10] = "SCI\t", "SMBUS0\t", "ASF\t", "HDA\t", "FC\t\t", "GEC\t", "PerMon\t", "SD\t", + [0x20] = "IMC INT0\t", "IMC INT1\t", "IMC INT2\t", "IMC INT3\t", "IMC INT4\t", "IMC INT5\t", + [0x30] = "Dev18.0 INTA", "Dev18.2 INTB", "Dev19.0 INTA", "Dev19.2 INTB", "Dev22.0 INTA", "Dev22.2 INTB", + [0x40] = "RSVD\t", "SATA\t", + [0x60] = "RSVD\t", "RSVD\t", "GPIO\t", +}; #endif #endif /* AMD_PCI_INT_TYPES_H */ |