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-rw-r--r--src/soc/intel/apollolake/Kconfig12
-rw-r--r--src/soc/intel/apollolake/cpu.c3
2 files changed, 15 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 0c0fca9475..c9b17b047d 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -370,12 +370,24 @@ config CPU_BCLK_MHZ
config APL_SKIP_SET_POWER_LIMITS
bool
+ depends on !APL_SET_MIN_CLOCK_RATIO
default n
help
Some Apollo Lake mainboards do not need the Running Average Power
Limits (RAPL) algorithm for a constant power management.
Set this config option to skip the RAPL configuration.
+config APL_SET_MIN_CLOCK_RATIO
+ bool
+ depends on !APL_SKIP_SET_POWER_LIMITS
+ default n
+ help
+ If the power budget of the mainboard is limited, it can be useful to
+ limit the CPU power dissipation at the cost of performance by setting
+ the lowest possible CPU clock. Enable this option if you need smallest
+ possible CPU clock. This setting can be overruled by the OS if it has an
+ p-state driver which can adjust the clock to its need.
+
# M and N divisor values for clock frequency configuration.
# These values get us a 1.836 MHz clock (ideally we want 1.843 MHz)
config SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c
index bf5beacbb1..bcec28e514 100644
--- a/src/soc/intel/apollolake/cpu.c
+++ b/src/soc/intel/apollolake/cpu.c
@@ -92,6 +92,9 @@ void soc_core_init(struct device *cpu)
if (IS_ENABLED(CONFIG_APL_SKIP_SET_POWER_LIMITS)) {
cpu_set_p_state_to_max_non_turbo_ratio();
cpu_disable_eist();
+ } else if (IS_ENABLED(CONFIG_APL_SET_MIN_CLOCK_RATIO)) {
+ cpu_set_p_state_to_min_clock_ratio();
+ cpu_disable_eist();
}
}