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-rw-r--r--src/drivers/amd/agesa/eventlog.c27
-rw-r--r--src/drivers/amd/agesa/romstage.c2
-rw-r--r--src/drivers/amd/agesa/state_machine.c20
-rw-r--r--src/northbridge/amd/agesa/state_machine.h2
-rw-r--r--src/vendorcode/amd/Kconfig9
5 files changed, 57 insertions, 3 deletions
diff --git a/src/drivers/amd/agesa/eventlog.c b/src/drivers/amd/agesa/eventlog.c
index 152011ed34..887da308d4 100644
--- a/src/drivers/amd/agesa/eventlog.c
+++ b/src/drivers/amd/agesa/eventlog.c
@@ -16,6 +16,7 @@
#include <console/console.h>
#include <stdint.h>
#include <string.h>
+#include <timestamp.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <northbridge/amd/agesa/BiosCallOuts.h>
@@ -30,54 +31,78 @@ struct agesa_mapping
{
AGESA_STRUCT_NAME func;
const char *name;
+ uint32_t entry_id;
+ uint32_t exit_id;
};
static const struct agesa_mapping entrypoint[] = {
{
.func = AMD_INIT_RESET,
.name = "AmdInitReset",
+ .entry_id = TS_AGESA_INIT_RESET_START,
+ .exit_id = TS_AGESA_INIT_RESET_DONE,
},
{
.func = AMD_INIT_EARLY,
.name = "AmdInitEarly",
+ .entry_id = TS_AGESA_INIT_EARLY_START,
+ .exit_id = TS_AGESA_INIT_EARLY_DONE,
},
{
.func = AMD_INIT_POST,
.name = "AmdInitPost",
+ .entry_id = TS_AGESA_INIT_POST_START,
+ .exit_id = TS_AGESA_INIT_POST_DONE,
},
{
.func = AMD_INIT_RESUME,
.name = "AmdInitResume",
+ .entry_id = TS_AGESA_INIT_RESUME_START,
+ .exit_id = TS_AGESA_INIT_RESUME_DONE,
},
{
.func = AMD_INIT_ENV,
.name = "AmdInitEnv",
+ .entry_id = TS_AGESA_INIT_ENV_START,
+ .exit_id = TS_AGESA_INIT_ENV_DONE,
},
{
.func = AMD_INIT_MID,
.name = "AmdInitMid",
+ .entry_id = TS_AGESA_INIT_MID_START,
+ .exit_id = TS_AGESA_INIT_MID_DONE,
},
{
.func = AMD_INIT_LATE,
.name = "AmdInitLate",
+ .entry_id = TS_AGESA_INIT_LATE_START,
+ .exit_id = TS_AGESA_INIT_LATE_DONE,
},
{
.func = AMD_S3LATE_RESTORE,
.name = "AmdS3LateRestore",
+ .entry_id = TS_AGESA_S3_LATE_START,
+ .exit_id = TS_AGESA_S3_LATE_DONE,
},
#if !defined(AMD_S3_SAVE_REMOVED)
{
.func = AMD_S3_SAVE,
.name = "AmdS3Save",
+ .entry_id = TS_AGESA_INIT_RTB_START,
+ .exit_id = TS_AGESA_INIT_RTB_DONE,
},
#endif
{
.func = AMD_S3FINAL_RESTORE,
.name = "AmdS3FinalRestore",
+ .entry_id = TS_AGESA_S3_FINAL_START,
+ .exit_id = TS_AGESA_S3_FINAL_DONE,
},
{
.func = AMD_INIT_RTB,
.name = "AmdInitRtb",
+ .entry_id = TS_AGESA_INIT_RTB_START,
+ .exit_id = TS_AGESA_INIT_RTB_DONE,
},
};
@@ -92,6 +117,8 @@ void agesa_state_on_entry(struct agesa_state *task, AGESA_STRUCT_NAME func)
for (i = 0; i < ARRAY_SIZE(entrypoint); i++) {
if (task->func == entrypoint[i].func) {
task->function_name = entrypoint[i].name;
+ task->ts_entry_id = entrypoint[i].entry_id;
+ task->ts_exit_id = entrypoint[i].exit_id;
break;
}
}
diff --git a/src/drivers/amd/agesa/romstage.c b/src/drivers/amd/agesa/romstage.c
index d5b20b76f9..adf6e0d0e3 100644
--- a/src/drivers/amd/agesa/romstage.c
+++ b/src/drivers/amd/agesa/romstage.c
@@ -90,8 +90,6 @@ void *asmlinkage romstage_main(unsigned long bist)
else
agesa_execute_state(cb, AMD_INIT_RESUME);
- /* FIXME: Detect if TSC frequency changed during raminit? */
- timestamp_rescale_table(1, 4);
timestamp_add_now(TS_AFTER_INITRAM);
/* Work around AGESA setting all memory as WB on normal
diff --git a/src/drivers/amd/agesa/state_machine.c b/src/drivers/amd/agesa/state_machine.c
index 03c658287d..c8529c5e04 100644
--- a/src/drivers/amd/agesa/state_machine.c
+++ b/src/drivers/amd/agesa/state_machine.c
@@ -20,7 +20,9 @@
#include <arch/cpu.h>
#include <bootstate.h>
#include <cbfs.h>
-#include <console/console.h>
+#include <cbmem.h>
+#include <timestamp.h>
+
#include <northbridge/amd/agesa/state_machine.h>
#include <northbridge/amd/agesa/agesa_helper.h>
#include <northbridge/amd/agesa/BiosCallOuts.h>
@@ -147,6 +149,11 @@ static AGESA_STATUS romstage_dispatch(struct sysinfo *cb,
platform_BeforeInitPost(cb, param);
board_BeforeInitPost(cb, param);
status = module_dispatch(func, StdHeader);
+
+ /* FIXME: Detect if TSC frequency really
+ * changed during raminit? */
+ timestamp_rescale_table(1, 4);
+
platform_AfterInitPost(cb, param);
break;
}
@@ -156,6 +163,11 @@ static AGESA_STATUS romstage_dispatch(struct sysinfo *cb,
AMD_RESUME_PARAMS *param = (void *)StdHeader;
platform_BeforeInitResume(cb, param);
status = module_dispatch(func, StdHeader);
+
+ /* FIXME: Detect if TSC frequency really
+ * changed during raminit? */
+ timestamp_rescale_table(1, 4);
+
platform_AfterInitResume(cb, param);
break;
}
@@ -262,12 +274,18 @@ int agesa_execute_state(struct sysinfo *cb, AGESA_STRUCT_NAME func)
AMD_CONFIG_PARAMS *StdHeader = aip.NewStructPtr;
ASSERT(StdHeader->Func == func);
+ if (CONFIG(AGESA_EXTRA_TIMESTAMPS) && task.ts_entry_id)
+ timestamp_add_now(task.ts_entry_id);
+
if (ENV_ROMSTAGE)
final = romstage_dispatch(cb, func, StdHeader);
if (ENV_RAMSTAGE)
final = ramstage_dispatch(cb, func, StdHeader);
+ if (CONFIG(AGESA_EXTRA_TIMESTAMPS) && task.ts_exit_id)
+ timestamp_add_now(task.ts_exit_id);
+
agesawrapper_trace(final, StdHeader, task.function_name);
ASSERT(final < AGESA_FATAL);
diff --git a/src/northbridge/amd/agesa/state_machine.h b/src/northbridge/amd/agesa/state_machine.h
index 74c3f61e0d..7d9fe9c5ef 100644
--- a/src/northbridge/amd/agesa/state_machine.h
+++ b/src/northbridge/amd/agesa/state_machine.h
@@ -59,6 +59,8 @@ struct agesa_state {
AGESA_STRUCT_NAME func;
const char *function_name;
+ uint32_t ts_entry_id;
+ uint32_t ts_exit_id;
};
void agesa_state_on_entry(struct agesa_state *task, AGESA_STRUCT_NAME func);
diff --git a/src/vendorcode/amd/Kconfig b/src/vendorcode/amd/Kconfig
index 3fe0c82240..44b3940fa7 100644
--- a/src/vendorcode/amd/Kconfig
+++ b/src/vendorcode/amd/Kconfig
@@ -47,6 +47,15 @@ if CPU_AMD_AGESA_BINARY_PI
source src/vendorcode/amd/pi/Kconfig
endif
+config AGESA_EXTRA_TIMESTAMPS
+ bool "Add instrumentation for AGESA calls"
+ default n
+ depends on !BINARYPI_LEGACY_WRAPPER
+ depends on DRIVERS_AMD_PI
+ help
+ Insert additional timestamps around each entrypoint into
+ AGESA vendorcode.
+
endmenu
endif