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-rw-r--r--src/soc/intel/apollolake/bootblock/bootblock.c9
-rw-r--r--src/soc/intel/apollolake/chip.c6
2 files changed, 6 insertions, 9 deletions
diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c
index c791378f13..ac6903a9d2 100644
--- a/src/soc/intel/apollolake/bootblock/bootblock.c
+++ b/src/soc/intel/apollolake/bootblock/bootblock.c
@@ -122,12 +122,3 @@ void bootblock_soc_early_init(void)
paging_enable_for_car("pdpt", "pt");
}
}
-
-void bootblock_soc_init(void)
-{
- /*
- * Clear the GPI interrupt enable & status registers to avoid any
- * interrupt storm during the kernel bootup.
- */
- gpi_clear_int_cfg();
-}
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 279551f9e0..f6880a7f3f 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -395,6 +395,12 @@ static void soc_init(void *data)
* default policy that doesn't honor boards' requirements. */
itss_snapshot_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END);
+ /*
+ * Clear the GPI interrupt status and enable registers. These
+ * registers do not get reset to default state when booting from S5.
+ */
+ gpi_clear_int_cfg();
+
fsp_silicon_init(romstage_handoff_is_resume());
/* Restore GPIO IRQ polarities back to previous settings. */