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-rw-r--r--src/soc/imgtec/pistachio/ddr2_init.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/imgtec/pistachio/ddr2_init.c b/src/soc/imgtec/pistachio/ddr2_init.c
index 0943cfa74c..ad5cf888d6 100644
--- a/src/soc/imgtec/pistachio/ddr2_init.c
+++ b/src/soc/imgtec/pistachio/ddr2_init.c
@@ -119,7 +119,7 @@
#define DDRPHY_BISTUDPR_OFFSET (0x0120)
#define DDRPHY_DLLGCR_OFFSET (0x0010)
-#define BL8 1
+#define BL8 0
#define DDR_TIMEOUT_VALUE_US 100000