diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.c | 35 |
1 files changed, 32 insertions, 3 deletions
diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c index 51fdd2e76d..0b0fc3578f 100644 --- a/src/southbridge/intel/bd82x6x/pch.c +++ b/src/southbridge/intel/bd82x6x/pch.c @@ -25,7 +25,7 @@ #include <device/pci.h> #endif #include "pch.h" - +#include <string.h> int pch_silicon_revision(void) { @@ -255,10 +255,24 @@ static void pch_pcie_function_swap(u8 old_fn, u8 new_fn) } /* Update devicetree with new Root Port function number assignment */ -static void pch_pcie_devicetree_update(void) +static void pch_pcie_devicetree_update( + struct southbridge_intel_bd82x6x_config *config) { device_t dev; + /* + * hotplug map should also be updated along with their + * corresponding port + */ + u8 new_hotplug_map[sizeof(config->pcie_hotplug_map)]; + + /* + * Slots that didn't move need the hotplug setting copied too, + * so "new_hotplug_map" is initialized with the values of the old map. + */ + memcpy(new_hotplug_map, config->pcie_hotplug_map, + sizeof(new_hotplug_map)); + /* Update the function numbers in the static devicetree */ for (dev = all_devices; dev; dev = dev->next) { u8 new_devfn; @@ -280,9 +294,21 @@ static void pch_pcie_devicetree_update(void) PCI_FUNC(dev->path.pci.devfn), PCI_SLOT(new_devfn), PCI_FUNC(new_devfn)); + /* + * Copy the flag to its new position along with + * the corresponding port + */ + new_hotplug_map[PCI_FUNC(new_devfn)] = + config->pcie_hotplug_map + [PCI_FUNC(dev->path.pci.devfn)]; + dev->path.pci.devfn = new_devfn; } } + + /* Copy the updated map back to its place */ + memcpy(config->pcie_hotplug_map, new_hotplug_map, + sizeof(new_hotplug_map)); } /* Special handling for PCIe Root Port devices */ @@ -291,6 +317,9 @@ static void pch_pcie_enable(device_t dev) struct southbridge_intel_bd82x6x_config *config = dev->chip_info; u32 reg32; + if (!config) + return; + /* * Save a copy of the Root Port Function Number map when * starting to walk the list of PCIe Root Ports so it can @@ -389,7 +418,7 @@ static void pch_pcie_enable(device_t dev) /* Update static devictree with new function numbers */ if (config->pcie_port_coalesce) - pch_pcie_devicetree_update(); + pch_pcie_devicetree_update(config); } } |