diff options
Diffstat (limited to 'src')
5 files changed, 8 insertions, 6 deletions
diff --git a/src/mainboard/intel/cougar_canyon2/romstage.c b/src/mainboard/intel/cougar_canyon2/romstage.c index c90ece2e56..6b4c1195fe 100644 --- a/src/mainboard/intel/cougar_canyon2/romstage.c +++ b/src/mainboard/intel/cougar_canyon2/romstage.c @@ -172,7 +172,6 @@ static void rcba_config(void) RCBA32(FD) = reg32; } -void main(FSP_INFO_HEADER *fsp_info_header); // XXX find a better place dorothy void main(FSP_INFO_HEADER *fsp_info_header) { #if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) diff --git a/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.h b/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.h index 23749430eb..f05b0fcd74 100644 --- a/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.h +++ b/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.h @@ -60,6 +60,9 @@ #define FSP_IMAGE_ID_DWORD1 0x00505346 #endif +#ifdef __PRE_RAM__ +void main(FSP_INFO_HEADER *fsp_info_header); void romstage_main_continue(EFI_STATUS status, VOID *HobListPtr); +#endif #endif /* CHIPSET_FSP_UTIL_H */ diff --git a/src/soc/intel/fsp_baytrail/baytrail/romstage.h b/src/soc/intel/fsp_baytrail/baytrail/romstage.h index 1ceb4cf7cb..a800600626 100644 --- a/src/soc/intel/fsp_baytrail/baytrail/romstage.h +++ b/src/soc/intel/fsp_baytrail/baytrail/romstage.h @@ -29,9 +29,9 @@ void report_platform_info(void); #include <stdint.h> #include <arch/cpu.h> +#include <drivers/intel/fsp/fsp_util.h> -#include <fsptypes.h> - +void main(FSP_INFO_HEADER *fsp_info_header); void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr); uint32_t chipset_prev_sleep_state(uint32_t clear); diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c index 6dff7434cf..259ecdc679 100644 --- a/src/soc/intel/fsp_baytrail/romstage/romstage.c +++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c @@ -152,7 +152,7 @@ static void baytrail_rtc_init(void) } /* Entry from cache-as-ram.inc. */ -void * asmlinkage main(FSP_INFO_HEADER *fsp_info_header) +void main(FSP_INFO_HEADER *fsp_info_header) { const unsigned long func_dis = PMC_BASE_ADDRESS + FUNC_DIS; const unsigned long func_dis2 = PMC_BASE_ADDRESS + FUNC_DIS2; diff --git a/src/southbridge/intel/fsp_rangeley/romstage.h b/src/southbridge/intel/fsp_rangeley/romstage.h index e09486221a..4afce5f821 100644 --- a/src/southbridge/intel/fsp_rangeley/romstage.h +++ b/src/southbridge/intel/fsp_rangeley/romstage.h @@ -27,9 +27,9 @@ #include <stdint.h> #include <arch/cpu.h> +#include <drivers/intel/fsp/fsp_util.h> -#include <fsptypes.h> - +void main(FSP_INFO_HEADER *fsp_info_header); void early_mainboard_romstage_entry(void); void late_mainboard_romstage_entry(void); void get_func_disables(uint32_t *mask); |