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-rw-r--r--src/mainboard/pcengines/apu1/mainboard.c12
-rw-r--r--src/mainboard/pcengines/apu1/platform_cfg.h4
2 files changed, 14 insertions, 2 deletions
diff --git a/src/mainboard/pcengines/apu1/mainboard.c b/src/mainboard/pcengines/apu1/mainboard.c
index f80f24ec87..82cf9921a5 100644
--- a/src/mainboard/pcengines/apu1/mainboard.c
+++ b/src/mainboard/pcengines/apu1/mainboard.c
@@ -183,6 +183,18 @@ static void mainboard_enable(device_t dev)
config_gpio_mux();
+ /* Power off unused clock pins of GPP PCIe devices */
+ u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE);
+ /* GPP CLK0-2 are connected to the 3 ethernet chips
+ * GPP CLK3-4 are connected to the miniPCIe slots */
+ write8(misc_mem_clk_cntrl + 0, 0xFF);
+ write8(misc_mem_clk_cntrl + 1, 0xFF);
+ /* GPP CLK5 is only connected to test pads -> disable */
+ write8(misc_mem_clk_cntrl + 2, 0x0F);
+ /* disable unconnected GPP CLK6-8 and SLT_GFX_CLK */
+ write8(misc_mem_clk_cntrl + 3, 0x00);
+ write8(misc_mem_clk_cntrl + 4, 0x00);
+
/* Initialize the PIRQ data structures for consumption */
pirq_setup();
}
diff --git a/src/mainboard/pcengines/apu1/platform_cfg.h b/src/mainboard/pcengines/apu1/platform_cfg.h
index 946f238bdd..7172e8283e 100644
--- a/src/mainboard/pcengines/apu1/platform_cfg.h
+++ b/src/mainboard/pcengines/apu1/platform_cfg.h
@@ -69,12 +69,12 @@
* 0 - disable
* 1 - enable
* PCI SLOT 0 define at BIT0
- * PCI SLOT 1 define at BIT1
+ * PCI SLOT 1 define at BIT1 -> connected to LPC devices
* PCI SLOT 2 define at BIT2
* PCI SLOT 3 define at BIT3
* PCI SLOT 4 define at BIT4
*/
-#define PCI_CLOCK_CTRL 0x1F
+#define PCI_CLOCK_CTRL 0x02
/**
* @def SATA_CONTROLLER